diff options
| author | Ben Dooks <ben-linux@fluff.org> | 2010-04-30 11:12:58 +0900 |
|---|---|---|
| committer | Ben Dooks <ben-linux@fluff.org> | 2010-05-10 11:44:43 +0900 |
| commit | 8d6f8658305db969981f64a22296b487ef2f1148 (patch) | |
| tree | 7c5de11b14ae048489e41d3cff15f5a89b1beb61 /arch/arm/plat-s3c24xx | |
| parent | af337f3e633a198034a99450416257ddf2307497 (diff) | |
ARM: S3C2416: Add basic clock support
Add basic clock support for the PLLs, HSMMC channels and
PWM clocks. This is enough to get a basic system up and
running.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c24xx')
| -rw-r--r-- | arch/arm/plat-s3c24xx/include/plat/pll.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c24xx/include/plat/pll.h b/arch/arm/plat-s3c24xx/include/plat/pll.h index 7ea8bffa7a9..005729a1077 100644 --- a/arch/arm/plat-s3c24xx/include/plat/pll.h +++ b/arch/arm/plat-s3c24xx/include/plat/pll.h @@ -35,3 +35,28 @@ s3c24xx_get_pll(unsigned int pllval, unsigned int baseclk) return (unsigned int)fvco; } + +#define S3C2416_PLL_M_SHIFT (14) +#define S3C2416_PLL_P_SHIFT (5) +#define S3C2416_PLL_S_MASK (7) +#define S3C2416_PLL_M_MASK ((1 << 10) - 1) +#define S3C2416_PLL_P_MASK (63) + +static inline unsigned int +s3c2416_get_pll(unsigned int pllval, unsigned int baseclk) +{ + unsigned int m, p, s; + uint64_t fvco; + + m = pllval >> S3C2416_PLL_M_SHIFT; + p = pllval >> S3C2416_PLL_P_SHIFT; + + s = pllval & S3C2416_PLL_S_MASK; + m &= S3C2416_PLL_M_MASK; + p &= S3C2416_PLL_P_MASK; + + fvco = (uint64_t)baseclk * m; + do_div(fvco, (p << s)); + + return (unsigned int)fvco; +} |