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authorHerbert Xu <herbert@gondor.apana.org.au>2011-01-07 14:55:06 +1100
committerHerbert Xu <herbert@gondor.apana.org.au>2011-01-07 14:55:06 +1100
commit55db8387a5e8d07407f0b7c6b2526417a2bc6243 (patch)
tree389c3f6cc183f48765eabdc578e8609ea6449f95 /arch/arm/plat-orion/pcie.c
parent21493088733e6e09dac6f54595a1b6b8ab1e68fd (diff)
hwrng: via_rng - Fix memory scribbling on some CPUs
It has been reported that on at least one Nano CPU the xstore instruction will write as many as 16 bytes of data to the output buffer. This causes memory corruption as we use rng->priv which is only 4-8 bytes long. This patch fixes this by using an intermediate buffer on the stack with at least 16 bytes and aligned to a 16-byte boundary. The problem was observed on the following processor: processor : 0 vendor_id : CentaurHauls cpu family : 6 model : 15 model name : VIA Nano processor U2250 (1.6GHz Capable) stepping : 3 cpu MHz : 1600.000 cache size : 1024 KB fdiv_bug : no hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 10 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat clflush acpi mmx fxsr sse sse2 ss tm syscall nx lm constant_tsc up rep_good pni monitor vmx est tm2 ssse3 cx16 xtpr rng rng_en ace ace_en ace2 phe phe_en lahf_lm bogomips : 3192.08 clflush size : 64 cache_alignment : 128 address sizes : 36 bits physical, 48 bits virtual power management: Tested-by: Mario 'BitKoenig' Holbe <Mario.Holbe@TU-Ilmenau.DE> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'arch/arm/plat-orion/pcie.c')
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