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| author | Kukjin Kim <kgene.kim@samsung.com> | 2010-12-31 08:01:08 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-12-31 08:01:08 +0900 |
| commit | fa353e9f409340cefc7650854065cbcea85c347d (patch) | |
| tree | c98cc2835f8fd5f9b27a08ecc95afae8f38b3ec2 /arch/arm/mach-s5pv310/cpu.c | |
| parent | a8928ce7e09eed34b59525779cb833f8438d0733 (diff) | |
| parent | 85140ad591e696bc88b0ad7c978256f91099e6c9 (diff) | |
Merge branch 'dev/s5pv310-irq' into next-s5pv310
Diffstat (limited to 'arch/arm/mach-s5pv310/cpu.c')
| -rw-r--r-- | arch/arm/mach-s5pv310/cpu.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-s5pv310/cpu.c index 7b6e066e227..9900464082d 100644 --- a/arch/arm/mach-s5pv310/cpu.c +++ b/arch/arm/mach-s5pv310/cpu.c @@ -132,6 +132,15 @@ void __init s5pv310_init_irq(void) gic_cpu_init(0, S5P_VA_GIC_CPU); for (irq = 0; irq < MAX_COMBINER_NR; irq++) { + + /* + * From SPI(0) to SPI(39) and SPI(51), SPI(53) are + * connected to the interrupt combiner. These irqs + * should be initialized to support cascade interrupt. + */ + if ((irq >= 40) && !(irq == 51) && !(irq == 53)) + continue; + combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), COMBINER_IRQ(irq, 0)); combiner_cascade_irq(irq, IRQ_SPI(irq)); |