diff options
| author | Stephen Boyd <sboyd@codeaurora.org> | 2012-09-05 12:28:51 -0700 |
|---|---|---|
| committer | David Brown <davidb@codeaurora.org> | 2012-09-13 11:14:29 -0700 |
| commit | 66a8950949c12a2600ff62e78b24f42ef8f6d28e (patch) | |
| tree | c348c8ba6bf082bafaa44e390f3129ce2dd45b4c /arch/arm/mach-msm/board-msm8960.c | |
| parent | e8ea1ea90bfd90d3047924b77a3f76cf2147ada1 (diff) | |
ARM: msm: Don't touch GIC registers outside of GIC code
The MSM code has some antiquated register writes to set up the
PPIs to be edge triggered. Now that we have the percpu irq
interface we don't need this code so let's remove it and update
the percpu irq user (msm_timer) to set the irq type.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm/board-msm8960.c')
| -rw-r--r-- | arch/arm/mach-msm/board-msm8960.c | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c index 65f4a1daa2e..bdafe791fd0 100644 --- a/arch/arm/mach-msm/board-msm8960.c +++ b/arch/arm/mach-msm/board-msm8960.c @@ -55,24 +55,11 @@ static void __init msm8960_map_io(void) static void __init msm8960_init_irq(void) { - unsigned int i; gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE, (void *)MSM_QGIC_CPU_BASE); - /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */ - writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4); - if (machine_is_msm8960_rumi3()) writel(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET); - - /* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet - * as they are configured as level, which does not play nice with - * handle_percpu_irq. - */ - for (i = GIC_PPI_START; i < GIC_SPI_START; i++) { - if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE) - irq_set_handler(i, handle_percpu_irq); - } } static struct platform_device *sim_devices[] __initdata = { |