diff options
| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-03-19 12:44:41 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-05-30 00:48:51 +0100 |
| commit | 36bccb11a4ac7cc9d190c3062945f1c911a62801 (patch) | |
| tree | 499ae758e459a3334a96ab82084c9fd15f5208ea /arch/arm/mach-exynos | |
| parent | 4374d64933b1d0f0ebbad064289ef44b869d77c1 (diff) | |
ARM: l2c: remove platforms/SoCs setting early BRESP
Since we now automatically enable early BRESP in core L2C-310 code when
we detect a Cortex-A9, we don't need platforms/SoCs to set this bit
explicitly. Instead, they should seek to preserve the value of bit 30
in the auxiliary control register.
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-exynos')
| -rw-r--r-- | arch/arm/mach-exynos/exynos.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c index b32a907d021..e6828fb4603 100644 --- a/arch/arm/mach-exynos/exynos.c +++ b/arch/arm/mach-exynos/exynos.c @@ -32,8 +32,8 @@ #include "mfc.h" #include "regs-pmu.h" -#define L2_AUX_VAL 0x7C470001 -#define L2_AUX_MASK 0xC200ffff +#define L2_AUX_VAL 0x3c470001 +#define L2_AUX_MASK 0xc200ffff static struct map_desc exynos4_iodesc[] __initdata = { { |