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authorTakashi Iwai <tiwai@suse.de>2009-03-17 09:28:13 +0100
committerTakashi Iwai <tiwai@suse.de>2009-03-17 09:28:13 +0100
commit37ba1b62836d2440980cf553c49556393b05c6cd (patch)
tree3bbd9b76117d484d5a624db1b2b9ec0181c7ff55 /arch/arm/kernel/setup.c
parent1713c0d508fbbb42aa5f90039195e5ac31a50625 (diff)
parentdde332b660cf0bc2baaba678b52768a0fb6e6da2 (diff)
Merge branch 'fix/opl3sa2-suspend' into topic/isa-misc
Diffstat (limited to 'arch/arm/kernel/setup.c')
-rw-r--r--arch/arm/kernel/setup.c13
1 files changed, 7 insertions, 6 deletions
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 7049815d66d..68d6494c038 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -233,12 +233,13 @@ static void __init cacheid_init(void)
unsigned int cachetype = read_cpuid_cachetype();
unsigned int arch = cpu_architecture();
- if (arch >= CPU_ARCH_ARMv7) {
- cacheid = CACHEID_VIPT_NONALIASING;
- if ((cachetype & (3 << 14)) == 1 << 14)
- cacheid |= CACHEID_ASID_TAGGED;
- } else if (arch >= CPU_ARCH_ARMv6) {
- if (cachetype & (1 << 23))
+ if (arch >= CPU_ARCH_ARMv6) {
+ if ((cachetype & (7 << 29)) == 4 << 29) {
+ /* ARMv7 register format */
+ cacheid = CACHEID_VIPT_NONALIASING;
+ if ((cachetype & (3 << 14)) == 1 << 14)
+ cacheid |= CACHEID_ASID_TAGGED;
+ } else if (cachetype & (1 << 23))
cacheid = CACHEID_VIPT_ALIASING;
else
cacheid = CACHEID_VIPT_NONALIASING;