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| author | Olof Johansson <olof@lixom.net> | 2013-05-31 23:39:35 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2013-05-31 23:39:35 -0700 |
| commit | db9bde2fa518fa67d28ffa287d1209871bcdc789 (patch) | |
| tree | ef90d0d1fd72ab08dde7e9a6ca0556aa86686a80 /arch/arm/include | |
| parent | 6678e38959f99a5669ce0a261a0b7f09a9aff0f8 (diff) | |
| parent | 033a899c9b06e7e4f6733a637fee34c632ca2d47 (diff) | |
Merge branch 'VExpress_DCSCB' of git://git.linaro.org/people/nico/linux into next/soc
From Nicolas Pitre:
This is the first MCPM backend submission for VExpress running on RTSM
aka Fast Models implementing the big.LITTLE system architecture. This
enables SMP secondary boot as well as CPU hotplug on this platform.
A big prerequisite for this support is the CCI driver from Lorenzo
included in this pull request.
Also included is Rob Herring's set_auxcr/get_auxcr allowing nicer code.
Signed-off-by: Olof Johansson <olof@lixom.net>
* 'VExpress_DCSCB' of git://git.linaro.org/people/nico/linux:
ARM: vexpress: Select multi-cluster SMP operation if required
ARM: vexpress/dcscb: handle platform coherency exit/setup and CCI
ARM: vexpress/dcscb: do not hardcode number of CPUs per cluster
ARM: vexpress/dcscb: add CPU use counts to the power up/down API implementation
ARM: vexpress: introduce DCSCB support
ARM: introduce common set_auxcr/get_auxcr functions
drivers/bus: arm-cci: function to enable CCI ports from early boot code
drivers: bus: add ARM CCI support
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/cp15.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/include/asm/cp15.h b/arch/arm/include/asm/cp15.h index 1f3262e99d8..cedd3721318 100644 --- a/arch/arm/include/asm/cp15.h +++ b/arch/arm/include/asm/cp15.h @@ -61,6 +61,20 @@ static inline void set_cr(unsigned int val) isb(); } +static inline unsigned int get_auxcr(void) +{ + unsigned int val; + asm("mrc p15, 0, %0, c1, c0, 1 @ get AUXCR" : "=r" (val)); + return val; +} + +static inline void set_auxcr(unsigned int val) +{ + asm volatile("mcr p15, 0, %0, c1, c0, 1 @ set AUXCR" + : : "r" (val)); + isb(); +} + #ifndef CONFIG_SMP extern void adjust_cr(unsigned long mask, unsigned long set); #endif |