diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2014-03-17 15:17:07 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2014-03-17 15:17:07 +0100 |
| commit | 38edc2da5014e70e46a724d97c3ef3dde106331b (patch) | |
| tree | 590499bacd062e8dd74c6f05a7d811dd714a2d70 /arch/arm/include | |
| parent | 937b5991ca7717ceba99014f2ad3f51c85cdb9ad (diff) | |
| parent | 28b191118c11719bb27db621425a70be28a40e08 (diff) | |
Merge tag 'omap-for-v3.15/dt-overo-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Updates to the .dts files to support more Gumstix boards.
These are sent separately from the rest of the .dts changes
as these depend on the fixes merged into v3.14-rc4, and
needed a bit more time to get updated on the fixes.
* tag 'omap-for-v3.15/dt-overo-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Add support for the Overo Summit
ARM: dts: Add support for the Overo Chestnut43
ARM: dts: Add support for the Overo Alto35
ARM: dts: Add support for the Overo Gallop43
ARM: dts: Add support for the Overo Palo43
ARM: dts: overo: Add LIS33DE accelerometer
ARM: dts: overo: Create a file for common Gumstix peripherals
ARM: dts: overo: Push uart3 pinmux down to expansion board
ARM: dts: omap3-tobi: Add AT24C01 EEPROM
ARM: dts: omap3-tobi: Use include file omap-gpmc-smsc9221
ARM: dts: omap: Add common file for SMSC9221
ARM: dts: omap3-overo: Add HSUSB PHY
ARM: dts: omap3-overo: Enable WiFi/BT combo
ARM: dts: omap3-overo: Add missing pinctrl
ARM: dts: omap3-tobi: Add missing pinctrl
ARM: dts: overo: reorganize include files
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Conflicts:
arch/arm/boot/dts/omap3-overo.dtsi
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/cacheflush.h | 1 | ||||
| -rw-r--r-- | arch/arm/include/asm/pgtable-3level.h | 15 | ||||
| -rw-r--r-- | arch/arm/include/asm/spinlock.h | 15 |
3 files changed, 13 insertions, 18 deletions
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h index e9a49fe0284..8b8b61685a3 100644 --- a/arch/arm/include/asm/cacheflush.h +++ b/arch/arm/include/asm/cacheflush.h @@ -212,6 +212,7 @@ extern void copy_to_user_page(struct vm_area_struct *, struct page *, static inline void __flush_icache_all(void) { __flush_icache_preferred(); + dsb(); } /* diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h index 03243f7eedd..85c60adc8b6 100644 --- a/arch/arm/include/asm/pgtable-3level.h +++ b/arch/arm/include/asm/pgtable-3level.h @@ -120,13 +120,16 @@ /* * 2nd stage PTE definitions for LPAE. */ -#define L_PTE_S2_MT_UNCACHED (_AT(pteval_t, 0x5) << 2) /* MemAttr[3:0] */ -#define L_PTE_S2_MT_WRITETHROUGH (_AT(pteval_t, 0xa) << 2) /* MemAttr[3:0] */ -#define L_PTE_S2_MT_WRITEBACK (_AT(pteval_t, 0xf) << 2) /* MemAttr[3:0] */ -#define L_PTE_S2_RDONLY (_AT(pteval_t, 1) << 6) /* HAP[1] */ -#define L_PTE_S2_RDWR (_AT(pteval_t, 3) << 6) /* HAP[2:1] */ +#define L_PTE_S2_MT_UNCACHED (_AT(pteval_t, 0x0) << 2) /* strongly ordered */ +#define L_PTE_S2_MT_WRITETHROUGH (_AT(pteval_t, 0xa) << 2) /* normal inner write-through */ +#define L_PTE_S2_MT_WRITEBACK (_AT(pteval_t, 0xf) << 2) /* normal inner write-back */ +#define L_PTE_S2_MT_DEV_SHARED (_AT(pteval_t, 0x1) << 2) /* device */ +#define L_PTE_S2_MT_MASK (_AT(pteval_t, 0xf) << 2) -#define L_PMD_S2_RDWR (_AT(pmdval_t, 3) << 6) /* HAP[2:1] */ +#define L_PTE_S2_RDONLY (_AT(pteval_t, 1) << 6) /* HAP[1] */ +#define L_PTE_S2_RDWR (_AT(pteval_t, 3) << 6) /* HAP[2:1] */ + +#define L_PMD_S2_RDWR (_AT(pmdval_t, 3) << 6) /* HAP[2:1] */ /* * Hyp-mode PL2 PTE definitions for LPAE. diff --git a/arch/arm/include/asm/spinlock.h b/arch/arm/include/asm/spinlock.h index ef3c6072aa4..ac4bfae2670 100644 --- a/arch/arm/include/asm/spinlock.h +++ b/arch/arm/include/asm/spinlock.h @@ -37,18 +37,9 @@ static inline void dsb_sev(void) { -#if __LINUX_ARM_ARCH__ >= 7 - __asm__ __volatile__ ( - "dsb ishst\n" - SEV - ); -#else - __asm__ __volatile__ ( - "mcr p15, 0, %0, c7, c10, 4\n" - SEV - : : "r" (0) - ); -#endif + + dsb(ishst); + __asm__(SEV); } /* |