diff options
| author | H. Peter Anvin <hpa@linux.intel.com> | 2013-06-28 15:26:17 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2013-06-28 15:26:17 -0700 |
| commit | 9f84b6267ccde1bebe3f9cd40a91716b5ece5e20 (patch) | |
| tree | b51dcf9fb1b7205ed8134ad1169e73719897163d /arch/arc/include/asm/cacheflush.h | |
| parent | 719038de98bc8479b771c582a1e4a1e86079da22 (diff) | |
| parent | 5f8c4218148822fde6eebbeefc34bd0a6061e031 (diff) | |
Merge remote-tracking branch 'origin/x86/fpu' into queue/x86/cpu
Use the union of 3.10 x86/cpu and x86/fpu as baseline.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'arch/arc/include/asm/cacheflush.h')
| -rw-r--r-- | arch/arc/include/asm/cacheflush.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arc/include/asm/cacheflush.h b/arch/arc/include/asm/cacheflush.h index 9f841af4109..ef62682e8d9 100644 --- a/arch/arc/include/asm/cacheflush.h +++ b/arch/arc/include/asm/cacheflush.h @@ -93,14 +93,16 @@ static inline int cache_is_vipt_aliasing(void) #endif } -#define CACHE_COLOR(addr) (((unsigned long)(addr) >> (PAGE_SHIFT)) & 3) +#define CACHE_COLOR(addr) (((unsigned long)(addr) >> (PAGE_SHIFT)) & 1) /* * checks if two addresses (after page aligning) index into same cache set */ #define addr_not_cache_congruent(addr1, addr2) \ +({ \ cache_is_vipt_aliasing() ? \ - (CACHE_COLOR(addr1) != CACHE_COLOR(addr2)) : 0 \ + (CACHE_COLOR(addr1) != CACHE_COLOR(addr2)) : 0; \ +}) #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ do { \ |