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authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-04-13 15:51:51 +0200
committerBen Hutchings <ben@decadent.org.uk>2012-10-30 23:26:30 +0000
commitf654d7c3bbc0290054492d780801a40f992a23b9 (patch)
tree702f16265cc925f0f2c6f5aaa6d6c54b94583a5e
parent8b627487f0ca84067d592ab8a4d126620fa59092 (diff)
drm/i915: don't pwrite tiled objects through the gtt
commit c07496fa61f4c5cb2addd1c57f6b22fcaeea2eeb upstream. ... we will botch up the bit17 swizzling. Furthermore tiled pwrite is a (now) unused slowpath, so no one really cares. This fixes the last swizzling issues I have with i-g-t on my bit17 swizzling i915G. No regression, it's been broken since the dawn of gem, but it's nice for regression tracking when really _all_ i-g-t tests work. Actually this is not true, Chris Wilson noticed while reviewing this patch that the commit commit d9e86c0ee60f323e890484628f351bf50fa9a15d Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Wed Nov 10 16:40:20 2010 +0000 drm/i915: Pipelined fencing [infrastructure] contained a functional change that broke things. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch> [Luís Picciochi Oliveira: I picked the commit Daniel suggested and edited it to affect the code that matched the same logical location on the same function.] Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 33e155590a5..dbe4dbe4647 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -999,6 +999,7 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
if (obj->phys_obj)
ret = i915_gem_phys_pwrite(dev, obj, args, file);
else if (obj->gtt_space &&
+ obj->tiling_mode == I915_TILING_NONE &&
obj->base.write_domain != I915_GEM_DOMAIN_CPU) {
ret = i915_gem_object_pin(obj, 0, true);
if (ret)