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authorAlexander Duyck <alexander.h.duyck@intel.com>2010-08-19 13:36:49 +0000
committerDavid S. Miller <davem@davemloft.net>2010-08-19 16:40:52 -0700
commitf5dc442b4671e2961c2e5bb3e16a86ce7da86cd3 (patch)
tree9bf5a0c36bcd669dd8316f79bf0676fc7f8c2554
parent486545216472d67c16e3d3d60c5f21f60959c855 (diff)
ixgbe: combine accesses to FCTRL register into ixgbe_set_rx_mode
We are accessing the FCTRL register in multiple spots in the init path and we can simplify things by combining the configuration all into ixgbe_set_rx_mode. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/ixgbe/ixgbe_main.c13
1 files changed, 6 insertions, 7 deletions
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index 88e6936a157..b7553643f9a 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -2709,7 +2709,7 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
int i;
u32 rxctrl;
- u32 fctrl, hlreg0;
+ u32 hlreg0;
u32 rdrxctl;
int rx_buf_len;
@@ -2731,12 +2731,6 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
rx_buf_len = ALIGN(max_frame, 1024);
}
- fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
- fctrl |= IXGBE_FCTRL_BAM;
- fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
- fctrl |= IXGBE_FCTRL_PMCF;
- IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
-
hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
if (adapter->netdev->mtu <= ETH_DATA_LEN)
hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
@@ -3055,6 +3049,11 @@ void ixgbe_set_rx_mode(struct net_device *netdev)
fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
+ /* set all bits that we expect to always be set */
+ fctrl |= IXGBE_FCTRL_BAM;
+ fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
+ fctrl |= IXGBE_FCTRL_PMCF;
+
/* clear the bits we are changing the status of */
fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);