diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-04-30 14:01:42 +0200 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-05-10 21:56:43 +0200 |
commit | b4c09f3bbda97ec685afd604d8a3a08c72465910 (patch) | |
tree | f174ed656e6bf0a5946b0a4ac80765477df971f8 | |
parent | 70484559296623d49e559a3a10fa32fd2bc5dcc3 (diff) |
drm/i915: drop TVclock special casing on ilk+
TV-out uses the same reference clock as everyone else. The only
difference seems to be in the slightly different CB tuning limit.
Note that PLL_REF_INPUT_TVCLKINBC is a reserved value on ilk+. Also
strictly speaking we don't support native TV-out on ilk+, hence all
that code is dead. But Bspec still contains some residual mentions of
native TV-out on some pch-split platforms, so I've figured it doesn't
hurt to keep the code around a bit longer (e.g. in the cb tune
function).
v2: Improve the commit message as Jani suggested in his review.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 11 |
1 files changed, 1 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 9365c5aa16b..5fcd5b09ff5 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5637,9 +5637,6 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc, if (intel_encoder->needs_tv_clock) is_tv = true; break; - case INTEL_OUTPUT_TVOUT: - is_tv = true; - break; } num_connectors++; @@ -5698,13 +5695,7 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc, break; } - if (is_sdvo && is_tv) - dpll |= PLL_REF_INPUT_TVCLKINBC; - else if (is_tv) - /* XXX: just matching BIOS for now */ - /* dpll |= PLL_REF_INPUT_TVCLKINBC; */ - dpll |= 3; - else if (is_lvds && intel_panel_use_ssc(dev_priv) && num_connectors < 2) + if (is_lvds && intel_panel_use_ssc(dev_priv) && num_connectors < 2) dpll |= PLLB_REF_INPUT_SPREADSPECTRUMIN; else dpll |= PLL_REF_INPUT_DREFCLK; |