aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorJames Hogan <james.hogan@imgtec.com>2014-01-22 16:19:38 +0000
committerRalf Baechle <ralf@linux-mips.org>2014-03-26 23:09:11 +0100
commitaced4cbd6e3da7dd71f19d0378d27aa74f76e70b (patch)
treeb39ea1e677c6f9b737fb85ab858097ba45fd3bec
parentf43e4dfd3902a06bcc1cc1f1d96ba109f8156dda (diff)
MIPS: Add cases for CPU_P5600
Add a CPU_P5600 case to various switch statements, doing the same thing as for CPU_PROAPTIV. Signed-off-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6408/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/include/asm/cpu-type.h1
-rw-r--r--arch/mips/kernel/idle.c1
-rw-r--r--arch/mips/kernel/spram.c1
-rw-r--r--arch/mips/kernel/traps.c1
-rw-r--r--arch/mips/mm/c-r4k.c1
-rw-r--r--arch/mips/mm/sc-mips.c1
-rw-r--r--arch/mips/mm/tlbex.c1
7 files changed, 7 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h
index 02f591bd95c..61f803be4c2 100644
--- a/arch/mips/include/asm/cpu-type.h
+++ b/arch/mips/include/asm/cpu-type.h
@@ -46,6 +46,7 @@ static inline int __pure __get_cpu_type(const int cpu_type)
case CPU_M14KEC:
case CPU_INTERAPTIV:
case CPU_PROAPTIV:
+ case CPU_P5600:
#endif
#ifdef CONFIG_SYS_HAS_CPU_MIPS64_R1
diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c
index c1fd0bc7a31..04ea1c7a3d3 100644
--- a/arch/mips/kernel/idle.c
+++ b/arch/mips/kernel/idle.c
@@ -187,6 +187,7 @@ void __init check_wait(void)
case CPU_1074K:
case CPU_INTERAPTIV:
case CPU_PROAPTIV:
+ case CPU_P5600:
cpu_wait = r4k_wait;
if (read_c0_config7() & MIPS_CONF7_WII)
cpu_wait = r4k_wait_irqoff;
diff --git a/arch/mips/kernel/spram.c b/arch/mips/kernel/spram.c
index 707d957e6a6..f9a693a6aaa 100644
--- a/arch/mips/kernel/spram.c
+++ b/arch/mips/kernel/spram.c
@@ -208,6 +208,7 @@ void spram_config(void)
case CPU_1074K:
case CPU_INTERAPTIV:
case CPU_PROAPTIV:
+ case CPU_P5600:
config0 = read_c0_config();
/* FIXME: addresses are Malta specific */
if (config0 & (1<<24)) {
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 7ac4d8f44cf..ee1f2fc584e 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1439,6 +1439,7 @@ static inline void parity_protection_init(void)
case CPU_1074K:
case CPU_INTERAPTIV:
case CPU_PROAPTIV:
+ case CPU_P5600:
{
#define ERRCTL_PE 0x80000000
#define ERRCTL_L2P 0x00800000
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index d72e9a16cf1..6c37d21ef2f 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1115,6 +1115,7 @@ static void probe_pcache(void)
case CPU_1004K:
case CPU_1074K:
case CPU_INTERAPTIV:
+ case CPU_P5600:
case CPU_PROAPTIV:
if ((c->cputype == CPU_74K) || (c->cputype == CPU_1074K))
alias_74k_erratum(c);
diff --git a/arch/mips/mm/sc-mips.c b/arch/mips/mm/sc-mips.c
index 7b3977035a4..99eb8fabab6 100644
--- a/arch/mips/mm/sc-mips.c
+++ b/arch/mips/mm/sc-mips.c
@@ -79,6 +79,7 @@ static inline int mips_sc_is_activated(struct cpuinfo_mips *c)
case CPU_1074K:
case CPU_INTERAPTIV:
case CPU_PROAPTIV:
+ case CPU_P5600:
case CPU_BMIPS5000:
if (config2 & (1 << 12))
return 0;
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 151ca264c8a..ccae9a46e22 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -511,6 +511,7 @@ static void build_tlb_write_entry(u32 **p, struct uasm_label **l,
case CPU_74K:
case CPU_1074K:
case CPU_PROAPTIV:
+ case CPU_P5600:
break;
default: