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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2011-01-23 16:04:39 +0530
committerKevin Hilman <khilman@ti.com>2011-03-10 12:23:12 -0800
commit8409d57bc342536ffe96acc7cd6c7575d98d3edb (patch)
tree11d2fe0f122109ec2fd2cd9132517c5e56cd4d87
parent4444d712fd5b31f2348b57eaa2bbdc5e68c4e1b6 (diff)
OMAP3: PM: Fix the MMU on sequence in the asm code
Add necessary barriers after enabling MMU. Also use the sane way to load pc and jump to it instead of executing ldma first up. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
-rw-r--r--arch/arm/mach-omap2/sleep34xx.S5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 1c17ee81cb1..a31845a201e 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -617,12 +617,17 @@ usettbr0:
ldr r2, cache_pred_disable_mask
and r4, r2
mcr p15, 0, r4, c1, c0, 0
+ dsb
+ isb
+ ldr r0, =restoremmu_on
+ bx r0
/*
* ==============================
* == Exit point from OFF mode ==
* ==============================
*/
+restoremmu_on:
ldmfd sp!, {r0-r12, pc} @ restore regs and return