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authorOlof Johansson <olof@lixom.net>2013-01-29 09:53:34 -0800
committerOlof Johansson <olof@lixom.net>2013-01-29 09:53:44 -0800
commit6ed05a2aab3763b58922247543d7079106b254dc (patch)
treeda1cca64ba1e94d88d3cedefe7b21c0b184225c1
parent3d7b2c6087d011df3213d286b034f5716eae3209 (diff)
parent45e9d77a22b7b25373c7b8c0ea0b146168025360 (diff)
Merge tag 'bcm2835-for-3.9-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi into next/soc
From Stephen Warren: ARM: bcm2835: SoC driver updates The bcm2835 clock driver is enhanced to allow fixed clocks to be probed from device tree. A system power-off implementation is added. This branch is based on v3.8-rc3. * tag 'bcm2835-for-3.9-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi: ARM: bcm2835: add a pm_power_off implementation clk: bcm2835: probe for fixed-clock in device tree Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r--arch/arm/mach-bcm2835/bcm2835.c28
-rw-r--r--drivers/clk/clk-bcm2835.c9
2 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c
index 176d2d24782..1a446a164c8 100644
--- a/arch/arm/mach-bcm2835/bcm2835.c
+++ b/arch/arm/mach-bcm2835/bcm2835.c
@@ -26,11 +26,13 @@
#include <mach/bcm2835_soc.h>
#define PM_RSTC 0x1c
+#define PM_RSTS 0x20
#define PM_WDOG 0x24
#define PM_PASSWORD 0x5a000000
#define PM_RSTC_WRCFG_MASK 0x00000030
#define PM_RSTC_WRCFG_FULL_RESET 0x00000020
+#define PM_RSTS_HADWRH_SET 0x00000040
static void __iomem *wdt_regs;
@@ -67,6 +69,29 @@ static void bcm2835_restart(char mode, const char *cmd)
mdelay(1);
}
+/*
+ * We can't really power off, but if we do the normal reset scheme, and
+ * indicate to bootcode.bin not to reboot, then most of the chip will be
+ * powered off.
+ */
+static void bcm2835_power_off(void)
+{
+ u32 val;
+
+ /*
+ * We set the watchdog hard reset bit here to distinguish this reset
+ * from the normal (full) reset. bootcode.bin will not reboot after a
+ * hard reset.
+ */
+ val = readl_relaxed(wdt_regs + PM_RSTS);
+ val &= ~PM_RSTC_WRCFG_MASK;
+ val |= PM_PASSWORD | PM_RSTS_HADWRH_SET;
+ writel_relaxed(val, wdt_regs + PM_RSTS);
+
+ /* Continue with normal reset mechanism */
+ bcm2835_restart(0, "");
+}
+
static struct map_desc io_map __initdata = {
.virtual = BCM2835_PERIPH_VIRT,
.pfn = __phys_to_pfn(BCM2835_PERIPH_PHYS),
@@ -84,6 +109,9 @@ static void __init bcm2835_init(void)
int ret;
bcm2835_setup_restart();
+ if (wdt_regs)
+ pm_power_off = bcm2835_power_off;
+
bcm2835_init_clocks();
ret = of_platform_populate(NULL, of_default_bus_match_table, NULL,
diff --git a/drivers/clk/clk-bcm2835.c b/drivers/clk/clk-bcm2835.c
index e69991aab43..792bc57a9db 100644
--- a/drivers/clk/clk-bcm2835.c
+++ b/drivers/clk/clk-bcm2835.c
@@ -20,6 +20,13 @@
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/clk/bcm2835.h>
+#include <linux/clk-provider.h>
+#include <linux/of.h>
+
+static const __initconst struct of_device_id clk_match[] = {
+ { .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
+ { }
+};
/*
* These are fixed clocks. They're probably not all root clocks and it may
@@ -56,4 +63,6 @@ void __init bcm2835_init_clocks(void)
ret = clk_register_clkdev(clk, NULL, "20215000.uart");
if (ret)
pr_err("uart1_pclk alias not registered\n");
+
+ of_clk_init(clk_match);
}