Staging: rtl8187se: remove unused radio frontends

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

12 files changed, 0 insertions, 2611 deletions

diff --git a/drivers/staging/rtl8187se/Makefile b/drivers/staging/rtl8187se/Makefile
index 0ad7842ed81..c0c399bb30b 100644
--- a/drivers/staging/rtl8187se/Makefile
+++ b/drivers/staging/rtl8187se/Makefile
@@ -20,13 +20,9 @@ EXTRA_CFLAGS += -DENABLE_LPS
 
 rtl8187se-objs :=			\
 		r8180_core.o		\
-		r8180_sa2400.o		\
 		r8180_93cx6.o		\
 		r8180_wx.o		\
-		r8180_max2820.o		\
-		r8180_gct.o		\
 		r8180_rtl8225.o		\
-		r8180_rtl8255.o		\
 		r8180_rtl8225z2.o	\
 		r8185b_init.o		\
 		r8180_dm.o		\
diff --git a/drivers/staging/rtl8187se/r8180_core.c b/drivers/staging/rtl8187se/r8180_core.c
index 121a5d13b9e..1bf3818100e 100644
--- a/drivers/staging/rtl8187se/r8180_core.c
+++ b/drivers/staging/rtl8187se/r8180_core.c
@@ -54,11 +54,7 @@
 //#include <asm/uaccess.h>
 #include "r8180_hw.h"
 #include "r8180.h"
-#include "r8180_sa2400.h"  /* PHILIPS Radio frontend */
-#include "r8180_max2820.h" /* MAXIM Radio frontend */
-#include "r8180_gct.h"     /* GCT Radio frontend */
 #include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
-#include "r8180_rtl8255.h" /* RTL8255 Radio frontend */
 #include "r8180_93cx6.h"   /* Card EEPROM */
 #include "r8180_wx.h"
 #include "r8180_dm.h"
diff --git a/drivers/staging/rtl8187se/r8180_gct.c b/drivers/staging/rtl8187se/r8180_gct.c
deleted file mode 100644
index 86cb427a7a4..00000000000
--- a/drivers/staging/rtl8187se/r8180_gct.c
+++ /dev/null
@@ -1,296 +0,0 @@
-/*
-   This files contains GCT radio frontend programming routines.
-
-   This is part of rtl8180 OpenSource driver
-   Copyright (C) Andrea Merello 2004-2005  <andreamrl@tiscali.it>
-   Released under the terms of GPL (General Public Licence)
-
-   Parts of this driver are based on the GPL part of the
-   official realtek driver
-
-   Parts of this driver are based on the rtl8180 driver skeleton
-   from Patric Schenke & Andres Salomon
-
-   Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
-
-   Code from Rtw8180 NetBSD driver by David Young has been really useful to
-   understand some things and gets some ideas
-
-   Code from rtl8181 project has been useful to me to understand some things.
-
-   Some code from 'Deuce' work
-
-   We want to tanks the Authors of such projects and the Ndiswrapper
-   project Authors.
-*/
-
-
-#include "r8180.h"
-#include "r8180_hw.h"
-#include "r8180_gct.h"
-
-
-//#define DEBUG_GCT
-
-/* the following experiment are just experiments.
- * this means if you enable them you can have every kind
- * of result, included damage the RF chip, so don't
- * touch them if you don't know what you are doing.
- * In any case, if you do it, do at your own risk
- */
-
-//#define GCT_EXPERIMENT1  //improve RX sensivity
-
-//#define GCT_EXPERIMENT2
-
-//#define GCT_EXPERIMENT3  //iprove a bit RX signal quality ?
-
-//#define GCT_EXPERIMENT4 //maybe solve some brokeness with experiment1 ?
-
-//#define GCT_EXPERIMENT5
-
-//#define GCT_EXPERIMENT6  //not good
-
-
-u32 gct_chan[] = {
-	0x0,	//dummy channel 0
-	0x0, //1
-	0x1, //2
-	0x2, //3
-	0x3, //4
-	0x4, //5
-	0x5, //6
-	0x6, //7
-	0x7, //8
-	0x8, //9
-	0x9, //10
-	0xa, //11
-	0xb, //12
-	0xc, //13
-	0xd, //14
-};
-
-int gct_encode[16] = {
-	0, 8, 4, 0xC,
-	2, 0xA, 6, 0xE,
-	1, 9, 5, 0xD,
-	3, 0xB, 7, 0xF
-};
-
-void gct_rf_stabilize(struct net_device *dev)
-{
-	force_pci_posting(dev);
-	mdelay(3); //for now use a great value.. we may optimize in future
-}
-
-
-void write_gct(struct net_device *dev, u8 adr, u32 data)
-{
-//	struct r8180_priv *priv = ieee80211_priv(dev);
-	u32 phy_config;
-
-	phy_config =  gct_encode[(data & 0xf00) >> 8];
-	phy_config |= gct_encode[(data & 0xf0) >> 4 ] << 4;
-	phy_config |= gct_encode[(data & 0xf)       ] << 8;
-	phy_config |= gct_encode[(adr >> 1) & 0xf   ] << 12;
-	phy_config |=            (adr & 1 )           << 16;
-	phy_config |= gct_encode[(data & 0xf000)>>12] << 24;
-
-	phy_config |= 0x90000000; // MAC will bang bits to the chip
-
-
-	write_nic_dword(dev,PHY_CONFIG,phy_config);
-#ifdef DEBUG_GCT
-	DMESG("Writing GCT: %x (adr %x)",phy_config,adr);
-#endif
-	gct_rf_stabilize(dev);
-}
-
-
-
-void gct_write_phy_antenna(struct net_device *dev,short ch)
-{
-	struct r8180_priv *priv = ieee80211_priv(dev);
-	u8 ant;
-
-	ant = GCT_ANTENNA;
-	if(priv->antb) /*default antenna is antenna B */
-		ant |= BB_ANTENNA_B;
-	if(ch == 14)
-		ant |= BB_ANTATTEN_CHAN14;
-	write_phy(dev,0x10,ant);
-	//DMESG("BB antenna %x ",ant);
-}
-
-
-void gct_rf_set_chan(struct net_device *dev, short ch)
-{
-	struct r8180_priv *priv = ieee80211_priv(dev);
-	u32 txpw = 0xff & priv->chtxpwr[ch];
-	u32 chan = gct_chan[ch];
-
-	//write_phy(dev,3,txpw);
-#ifdef DEBUG_GCT
-	DMESG("Gct set channel");
-#endif
-	/* set TX power */
-	write_gct(dev,0x15,0);
- 	write_gct(dev,6, txpw);
-	write_gct(dev,0x15, 0x10);
-	write_gct(dev,0x15,0);
-
-	/*set frequency*/
-	write_gct(dev,7, 0);
-      	write_gct(dev,0xB, chan);
-      	write_gct(dev,7, 0x1000);
-
-#ifdef DEBUG_GCT
-	DMESG("Gct set channel > write phy antenna");
-#endif
-
-
-	gct_write_phy_antenna(dev,ch);
-
-}
-
-
-void gct_rf_close(struct net_device *dev)
-{
-	u32 anaparam;
-
-	anaparam = read_nic_dword(dev,ANAPARAM);
-	anaparam &= 0x000fffff;
-	anaparam |= 0x3f900000;
-	rtl8180_set_anaparam(dev, anaparam);
-
-	write_gct(dev, 0x7, 0);
-	write_gct(dev, 0x1f, 0x45);
-	write_gct(dev, 0x1f, 0x5);
-	write_gct(dev, 0x0, 0x8e4);
-}
-
-
-void gct_rf_init(struct net_device *dev)
-{
-	struct r8180_priv *priv = ieee80211_priv(dev);
-	//u32 anaparam;
-
-
-	write_nic_byte(dev,PHY_DELAY,0x6);	//this is general
-	write_nic_byte(dev,CARRIER_SENSE_COUNTER,0x4c); //this is general
-
-	//DMESG("%x", read_nic_dword(dev,ANAPARAM));
-	/* we should set anaparm here*/
-	//rtl8180_set_anaparam(dev,anaparam);
-
-	write_gct(dev,0x1f,0);
-	write_gct(dev,0x1f,0);
-	write_gct(dev,0x1f,0x40);
-	write_gct(dev,0x1f,0x60);
-	write_gct(dev,0x1f,0x61);
-	write_gct(dev,0x1f,0x61);
-	write_gct(dev,0x0,0xae4);
-	write_gct(dev,0x1f,0x1);
-	write_gct(dev,0x1f,0x41);
-	write_gct(dev,0x1f,0x61);
-	write_gct(dev,0x1,0x1a23);
-	write_gct(dev,0x2,0x4971);
-	write_gct(dev,0x3,0x41de);
-	write_gct(dev,0x4,0x2d80);
-#ifdef GCT_EXPERIMENT1
-	//write_gct(dev,0x5,0x6810);  // from zydas driver. sens+ but quite slow
-	//write_gct(dev,0x5,0x681f);  //good+ (somewhat stable, better sens, performance decent)
-	write_gct(dev,0x5,0x685f);  //good performances, not sure sens is really so beeter
-	//write_gct(dev,0x5,0x687f);  //good performances, maybe sens is not improved
-	//write_gct(dev,0x5,0x689f);  //like above
-	//write_gct(dev,0x5,0x685e);  //bad
-	//write_gct(dev,0x5,0x68ff);  //good+ (somewhat stable, better sens(?), performance decent)
-	//write_gct(dev,0x5,0x68f0);  //bad
-	//write_gct(dev,0x5,0x6cff);  //sens+ but not so good
-	//write_gct(dev,0x5,0x6dff);  //sens+,apparentely very good but broken
-	//write_gct(dev,0x5,0x65ff);  //sens+,good
-	//write_gct(dev,0x5,0x78ff);  //sens + but almost broken
-	//write_gct(dev,0x5,0x7810);  //- //snes + but broken
-	//write_gct(dev,0x5,0x781f);  //-- //sens +
-	//write_gct(dev,0x5,0x78f0);  //low sens
-#else
-	write_gct(dev,0x5,0x61ff);   //best performance but weak sensitivity
-#endif
-#ifdef GCT_EXPERIMENT2
-	write_gct(dev,0x6,0xe);
-#else
-	write_gct(dev,0x6,0x0);
-#endif
-	write_gct(dev,0x7,0x0);
-	write_gct(dev,0x8,0x7533);
-	write_gct(dev,0x9,0xc401);
-	write_gct(dev,0xa,0x0);
-	write_gct(dev,0xc,0x1c7);
-	write_gct(dev,0xd,0x29d3);
-	write_gct(dev,0xe,0x2e8);
-	write_gct(dev,0x10,0x192);
-#ifdef GCT_EXPERIMENT3
-	write_gct(dev,0x11,0x246);
-#else
-	write_gct(dev,0x11,0x248);
-#endif
-	write_gct(dev,0x12,0x0);
-	write_gct(dev,0x13,0x20c4);
-#ifdef GCT_EXPERIMENT4
-	write_gct(dev,0x14,0xf488);
-#else
-	write_gct(dev,0x14,0xf4fc);
-#endif
-#ifdef GCT_EXPERIMENT5
-	write_gct(dev,0x15,0xb152);
-#else
-	write_gct(dev,0x15,0x0);
-#endif
-#ifdef GCT_EXPERIMENT6
-	write_gct(dev,0x1e,0x1);
-#endif
-	write_gct(dev,0x16,0x1500);
-
-	write_gct(dev,0x7,0x1000);
-	/*write_gct(dev,0x15,0x0);
-	write_gct(dev,0x6,0x15);
-	write_gct(dev,0x15,0x8);
-	write_gct(dev,0x15,0x0);
-*/
-	write_phy(dev,0,0xa8);
-
-/*	write_gct(dev,0x15,0x0);
-	write_gct(dev,0x6,0x12);
-	write_gct(dev,0x15,0x8);
-	write_gct(dev,0x15,0x0);
-*/
-	write_phy(dev,3,0x0);
-	write_phy(dev,4,0xc0); /* lna det*/
-	write_phy(dev,5,0x90);
-	write_phy(dev,6,0x1e);
-	write_phy(dev,7,0x64);
-
-#ifdef DEBUG_GCT
-	DMESG("Gct init> write phy antenna");
-#endif
-
-	gct_write_phy_antenna(dev,priv->chan);
-
-	write_phy(dev,0x11,0x88);
-	if(!priv->diversity)
-		write_phy(dev,0x12,0xc0);
-	else
-		write_phy(dev,0x12,0x40);
-
-	write_phy(dev,0x13,0x90 | priv->cs_treshold );
-
-	write_phy(dev,0x19,0x0);
-	write_phy(dev,0x1a,0xa0);
-	write_phy(dev,0x1b,0x44);
-
-#ifdef DEBUG_GCT
-	DMESG("Gct init > set channel2");
-#endif
-
-	gct_rf_set_chan(dev,priv->chan);
-}
diff --git a/drivers/staging/rtl8187se/r8180_gct.h b/drivers/staging/rtl8187se/r8180_gct.h
deleted file mode 100644
index fe965ca6430..00000000000
--- a/drivers/staging/rtl8187se/r8180_gct.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
-	This is part of rtl8180 OpenSource driver - v 0.20
-	Copyright (C) Andrea Merello 2004  <andreamrl@tiscali.it>
-	Released under the terms of GPL (General Public Licence)
-
-	Parts of this driver are based on the GPL part of the official realtek driver
-	Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon
-	Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
-
-	We want to tanks the Authors of such projects and the Ndiswrapper project Authors.
-*/
-
-#define GCT_ANTENNA 0xA3
-
-
-// we use the untouched eeprom value- cross your finger ;-)
-#define GCT_ANAPARAM_PWR1_ON ??
-#define GCT_ANAPARAM_PWR0_ON ??
-
-
-
-void gct_rf_init(struct net_device *dev);
-void gct_rf_set_chan(struct net_device *dev,short ch);
-
-void gct_rf_close(struct net_device *dev);
diff --git a/drivers/staging/rtl8187se/r8180_max2820.c b/drivers/staging/rtl8187se/r8180_max2820.c
deleted file mode 100644
index 0f301519fc3..00000000000
--- a/drivers/staging/rtl8187se/r8180_max2820.c
+++ /dev/null
@@ -1,171 +0,0 @@
-/*
-   This files contains MAXIM MAX2820 radio frontend programming routines.
-
-   This is part of rtl8180 OpenSource driver
-   Copyright (C) Andrea Merello 2004-2005  <andreamrl@tiscali.it>
-   Released under the terms of GPL (General Public Licence)
-
-   Parts of this driver are based on the GPL part of the
-   official realtek driver
-
-   Parts of this driver are based on the rtl8180 driver skeleton
-   from Patric Schenke & Andres Salomon
-
-   Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
-
-   NetBSD rtl8180 driver from Dave Young has been really useful to
-   understand how to program the MAXIM radio. Thanks a lot!!!
-
-   'The Deuce' tested this and fixed some bugs.
-
-   Code from rtl8181 project has been useful to me to understand some things.
-
-   We want to tanks the Authors of such projects and the Ndiswrapper
-   project Authors.
-*/
-
-
-#include "r8180.h"
-#include "r8180_hw.h"
-#include "r8180_max2820.h"
-
-
-//#define DEBUG_MAXIM
-
-u32 maxim_chan[] = {
-	0,	//dummy channel 0
-	12, //1
-	17, //2
-	22, //3
-	27, //4
-	32, //5
-	37, //6
-	42, //7
-	47, //8
-	52, //9
-	57, //10
-	62, //11
-	67, //12
-	72, //13
-	84, //14
-};
-
-void write_maxim(struct net_device *dev,u8 adr, u32 data) {
-	u32 temp;
-	temp =  0x90 + (data & 0xf);
-	temp <<= 16;
-	temp += adr;
-	temp <<= 8;
-	temp += (data >> 4) & 0xff;
-#ifdef DEBUG_MAXIM
-	DMESG("write_maxim: %08x", temp);
-#endif
-	write_nic_dword(dev, PHY_CONFIG, temp);
-	force_pci_posting(dev);
-	mdelay(1);
-}
-
-
-void maxim_write_phy_antenna(struct net_device *dev,short ch)
-{
-	struct r8180_priv *priv = ieee80211_priv(dev);
-	u8 ant;
-
-	ant = MAXIM_ANTENNA;
-	if(priv->antb) /*default antenna is antenna B */
-		ant |= BB_ANTENNA_B;
-	if(ch == 14)
-		ant |= BB_ANTATTEN_CHAN14;
-	write_phy(dev,0x10,ant);
-	//DMESG("BB antenna %x ",ant);
-}
-
-
-void maxim_rf_set_chan(struct net_device *dev, short ch)
-{
-	struct r8180_priv *priv = ieee80211_priv(dev);
-	u32 txpw = 0xff & priv->chtxpwr[ch];
-	u32 chan = maxim_chan[ch];
-
-	/*While philips SA2400 drive the PA bias
-	 *seems that for MAXIM we delegate this
-	 *to the BB
-	 */
-
-	//write_maxim(dev,5,txpw);
-	write_phy(dev,3,txpw);
-
-	maxim_write_phy_antenna(dev,ch);
-	write_maxim(dev,3,chan);
-}
-
-
-void maxim_rf_close(struct net_device *dev)
-{
-	write_phy(dev, 3, 0x8);
-	write_maxim(dev, 1, 0);
-}
-
-
-void maxim_rf_init(struct net_device *dev)
-{
-	struct r8180_priv *priv = ieee80211_priv(dev);
-	u32 anaparam;
-
-	write_nic_byte(dev,PHY_DELAY,0x6);	//this is general
-	write_nic_byte(dev,CARRIER_SENSE_COUNTER,0x4c); //this is general
-
-	/*these are maxim specific*/
-	anaparam = read_nic_dword(dev,ANAPARAM);
-	anaparam = anaparam &~ (ANAPARAM_TXDACOFF_SHIFT);
-	anaparam = anaparam &~ANAPARAM_PWR1_MASK;
-	anaparam = anaparam &~ANAPARAM_PWR0_MASK;
-	anaparam |= (MAXIM_ANAPARAM_PWR1_ON<<ANAPARAM_PWR1_SHIFT);
-	anaparam |= (MAXIM_ANAPARAM_PWR0_ON<<ANAPARAM_PWR0_SHIFT);
-
-	//rtl8180_set_anaparam(dev,anaparam);
-
-	/* MAXIM from netbsd driver */
-
-	write_maxim(dev,0, 7); /* test mode as indicated in datasheet*/
-	write_maxim(dev,1, 0x1e); /* enable register*/
-	write_maxim(dev,2, 1); /* synt register */
-
-
-	maxim_rf_set_chan(dev,priv->chan);
-
-	write_maxim(dev,4, 0x313); /* rx register*/
-
-	/* PA is driven directly by the BB, we keep the MAXIM bias
-	 * at the highest value in the boubt tha pleacing it to lower
-	 * values may introduce some further attenuation somewhere..
-	 */
-
-	write_maxim(dev,5, 0xf);
-
-
-	/*baseband configuration*/
-	write_phy(dev,0,0x88); //sys1
-	write_phy(dev,3,0x8); //txagc
-	write_phy(dev,4,0xf8); // lnadet
-	write_phy(dev,5,0x90); // ifagcinit
-	write_phy(dev,6,0x1a); // ifagclimit
-	write_phy(dev,7,0x64); // ifagcdet
-
-	/*Should be done something more here??*/
-
-	maxim_write_phy_antenna(dev,priv->chan);
-
-	write_phy(dev,0x11,0x88); //trl
-	if(priv->diversity)
-		write_phy(dev,0x12,0xc7);
-	else
-		write_phy(dev,0x12,0x47);
-
-	write_phy(dev,0x13,0x9b);
-
-	write_phy(dev,0x19,0x0); //CHESTLIM
-	write_phy(dev,0x1a,0x9f); //CHSQLIM
-
-	maxim_rf_set_chan(dev,priv->chan);
-}
diff --git a/drivers/staging/rtl8187se/r8180_max2820.h b/drivers/staging/rtl8187se/r8180_max2820.h
deleted file mode 100644
index 5d4fb550484..00000000000
--- a/drivers/staging/rtl8187se/r8180_max2820.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
-	This is part of rtl8180 OpenSource driver
-	Copyright (C) Andrea Merello 2004-2005  <andreamrl@tiscali.it>
-	Released under the terms of GPL (General Public Licence)
-
-	Parts of this driver are based on the GPL part of the official realtek driver
-	Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon
-	Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
-
-	We want to tanks the Authors of such projects and the Ndiswrapper project Authors.
-*/
-
-#define MAXIM_ANTENNA 0xb3
-#define MAXIM_ANAPARAM_PWR1_ON 0x8
-#define MAXIM_ANAPARAM_PWR0_ON 0x0
-
-
-void maxim_rf_init(struct net_device *dev);
-void maxim_rf_set_chan(struct net_device *dev,short ch);
-
-void maxim_rf_close(struct net_device *dev);
diff --git a/drivers/staging/rtl8187se/r8180_rtl8255.c b/drivers/staging/rtl8187se/r8180_rtl8255.c
deleted file mode 100644
index 014efcec91e..00000000000
--- a/drivers/staging/rtl8187se/r8180_rtl8255.c
+++ /dev/null
@@ -1,1807 +0,0 @@
-/*
-  This is part of the rtl8180-sa2400 driver
-  released under the GPL (See file COPYING for details).
-  Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
-
-  This files contains programming code for the rtl8255
-  radio frontend.
-
-  *Many* thanks to Realtek Corp. for their great support!
-
-*/
-
-#define BAND_A 1
-#define BAND_BG 2
-
-#include "r8180.h"
-#include "r8180_hw.h"
-#include "r8180_rtl8255.h"
-
-u32 rtl8255_chan[] = {
-	0,	//dummy channel 0
-	0x13, //1
-	0x115, //2
-	0x217, //3
-	0x219, //4
-	0x31b, //5
-	0x41d, //6
-	0x41f, //7
-	0x621, //8
-	0x623, //9
-	0x625, //10
-	0x627, //11
-	0x829, //12
-	0x82b, //13
-	0x92f, // 14
-};
-
-static short rtl8255_gain_2G[]={
-	0x33, 0x17, 0x7c, 0xc5,//-78
-	0x43, 0x17, 0x7a, 0xc5,//-74
-	0x53, 0x17, 0x78, 0xc5,//-70
-	0x63, 0x17, 0x76, 0xc5,//-66
-};
-
-
-static short rtl8255_agc[]={
-	0x1, 0x1, 0x1, 0x1, 0x1,         0x1, 0x1, 0x1, 0x1, 0x1,
-
-	0x1, 0x1, 0x2, 0x2, 0x3,         0x3, 0x4, 0x4, 0x5, 0x5,
-	0x6, 0x6, 0x7, 0x7, 0x8,         0x8, 0x9, 0x9, 0xa, 0xa,
-	0xb, 0xb, 0xc, 0xc, 0xd,         0xd, 0xe, 0xe, 0xf, 0xf,
-
-	0x10, 0x10, 0x11, 0x11, 0x12,    0x12, 0x13, 0x13, 0x14, 0x14,
-	0x15, 0x15, 0x16, 0x16, 0x17,    0x17, 0x18, 0x18, 0x19, 0x19,
-	0x1a, 0x1a, 0x1b, 0x1b, 0x1c,    0x1c, 0x1d, 0x1d, 0x1e, 0x1e,
-	0x1f, 0x1f,
-
-	0x20, 0x20, 0x21, 0x21, 0x22,    0x22, 0x23, 0x23, 0x24, 0x24,
-	0x25, 0x25, 0x26, 0x26, 0x27,    0x27, 0x28, 0x28, 0x29, 0x29,
-	0x2a, 0x2a,
-
-	0x2a, 0x2a, 0x2a, 0x2a, 0x2a,    0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
-	0x2a, 0x2a, 0x2a, 0x2a, 0x2a,    0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
-	0x2a, 0x2a, 0x2a, 0x2a, 0x2a,    0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
-	0x2a, 0x2a, 0x2a, 0x2a
-
-};
-
-void rtl8255_set_gain(struct net_device *dev, short gain)
-{
-
-//	struct r8180_priv *priv = ieee80211_priv(dev);
-
-	write_phy_ofdm(dev, 0x0d, rtl8255_gain_2G[gain * 4]);
-	write_phy_ofdm(dev, 0x23, rtl8255_gain_2G[gain * 4 + 1]);
-	write_phy_ofdm(dev, 0x1b, rtl8255_gain_2G[gain * 4 + 2]);
-	write_phy_ofdm(dev, 0x1d, rtl8255_gain_2G[gain * 4 + 3]);
-	//rtl8225_set_gain_usb(dev, gain);
-}
-
-void write_rtl8255_reg0c(struct net_device *dev, u32 d1, u32 d2, u32 d3, u32 d4,
-u32 d5, u32 d6, u32 d7, u32 d8, u32 d9, u32 d10)
-{
-	int i,j;
-	u16 out,select;
-	u8 bit;
-	u32 bangdata;
-//	struct r8180_priv *priv = ieee80211_priv(dev);
-
-	write_nic_word(dev,RFPinsEnable,
-		(read_nic_word(dev,RFPinsEnable) | 0x7));
-
-	select = read_nic_word(dev, RFPinsSelect);
-
-	write_nic_word(dev, RFPinsSelect, select | 0x7 | SW_CONTROL_GPIO);
-
-	out = read_nic_word(dev, RFPinsOutput) & 0xfff3;
-
-	write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN );//| 0x1fff);
-
-	force_pci_posting(dev);
-	udelay(2);
-
-	write_nic_word(dev, RFPinsOutput, out);
-
-	force_pci_posting(dev);
-	udelay(2);
-
-	for(j=0;j<10;j++)
-	{
-		switch(j)
-		{
-			case 9:
-			bangdata = d10 | 0x0c;
-			break;
-			case 8:
-			bangdata = d9;
-			break;
-			case 7:
-			bangdata = d8;
-			break;
-			case 6:
-			bangdata = d7;
-			break;
-			case 5:
-			bangdata = d6;
-			break;
-			case 4:
-			bangdata = d5;
-			break;
-			case 3:
-			bangdata = d4;
-			break;
-			case 2:
-			bangdata = d3;
-			break;
-			case 1:
-			bangdata = d2;
-			break;
-			case 0:
-			bangdata = d1;
-			break;
-			default:
-			bangdata=0xbadc0de; /* avoid gcc complaints */
-			break;
-		}
-
-		for(i=31; i>=0;i--){
-
-			bit = (bangdata & (1<<i)) >> i;
-
-			write_nic_word(dev, RFPinsOutput, bit | out);
-			force_pci_posting(dev);
-			udelay(1);
-			write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
-			force_pci_posting(dev);
-			udelay(1);
-		//	write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
-			i--;
-			bit = (bangdata & (1<<i)) >> i;
-
-			write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
-			force_pci_posting(dev);
-			udelay(1);
-		//	write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
-			write_nic_word(dev, RFPinsOutput, bit | out);
-			force_pci_posting(dev);
-			udelay(1);
-		}
-	}
-
-	write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
-	force_pci_posting(dev);
-	udelay(10);
-
-//	write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
-	write_nic_word(dev, RFPinsSelect, select | SW_CONTROL_GPIO);
-//	rtl8185_rf_pins_enable(dev);
-
-}
-
-void write_rtl8255(struct net_device *dev, u8 adr, u16 data)
-{
-	int i;
-	u16 out,select;
-	u8 bit;
-	u32 bangdata = (data << 4) | (adr & 0xf);
-//	struct r8180_priv *priv = ieee80211_priv(dev);
-
-	out = read_nic_word(dev, RFPinsOutput) & 0xfff3;
-
-	write_nic_word(dev,RFPinsEnable,
-		(read_nic_word(dev,RFPinsEnable) | 0x7));
-
-	select = read_nic_word(dev, RFPinsSelect);
-
-	write_nic_word(dev, RFPinsSelect, select | 0x7 | SW_CONTROL_GPIO);
-
-	force_pci_posting(dev);
-	udelay(10);
-
-	write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN );//| 0x1fff);
-
-	force_pci_posting(dev);
-	udelay(2);
-
-	write_nic_word(dev, RFPinsOutput, out);
-
-	force_pci_posting(dev);
-	udelay(10);
-
-
-	for(i=15; i>=0;i--){
-
-		bit = (bangdata & (1<<i)) >> i;
-
-		write_nic_word(dev, RFPinsOutput, bit | out);
-		write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
-		write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
-		i--;
-		bit = (bangdata & (1<<i)) >> i;
-
-		write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
-		write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
-		write_nic_word(dev, RFPinsOutput, bit | out);
-	}
-
-
-	write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
-
-	force_pci_posting(dev);
-	udelay(10);
-
-	write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
-	write_nic_word(dev, RFPinsSelect, select | SW_CONTROL_GPIO);
-
-	rtl8185_rf_pins_enable(dev);
-}
-
-void rtl8255_rf_close(struct net_device *dev)
-{
-
-//	rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_OFF);
-//	rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_OFF);
-}
-
-void rtl8255_SetTXPowerLevel(struct net_device *dev, short ch)
-{
-	struct r8180_priv *priv = ieee80211_priv(dev);
-
-	u8 cck_power_level = 0xff & priv->chtxpwr[ch];
-	u8 ofdm_power_level = 0xff & priv->chtxpwr_ofdm[ch];
-	write_nic_byte(dev, TX_GAIN_OFDM, ofdm_power_level);
-	write_nic_byte(dev, TX_GAIN_CCK, cck_power_level);
-	force_pci_posting(dev);
-	mdelay(1);
-	//write_nic_byte(dev, TX_AGC_CONTROL,4);
-}
-
-void rtl8255_rf_set_chan(struct net_device *dev, short ch)
-{
-	//write_rtl8225(dev, 0x7, rtl8225_chan[1]);
-	write_rtl8255(dev, 0x5, 0x65);
-	write_rtl8255(dev, 0x6, rtl8255_chan[ch]);
-	write_rtl8255(dev, 0x7, 0x7c);
-	write_rtl8255(dev, 0x8, 0x6);
-
-
-	force_pci_posting(dev);
-	set_current_state(TASK_INTERRUPTIBLE);
-	schedule_timeout(HZ);
-//	rtl8225_set_mode_B(dev);
-
-	rtl8255_SetTXPowerLevel(dev, ch);
-	/* FIXME FIXME FIXME */
-}
-
-void rtl8255_init_BGband(struct net_device *dev)
-{
-	write_rtl8255(dev, 0x3, 0x0);
-	write_rtl8255(dev, 0x1, 0x807);
-	write_rtl8255_reg0c(dev, 0x1554, 0xa800403b, 0xf6d44278, 0x804187cf, 0x40000027,
-		0x92402ac0, 0xf0009, 0x28000, 0xc00, 0x0);
-	write_rtl8255(dev, 0x1, 0x807);
-	write_rtl8255(dev, 0x4, 0xc00);
-	write_rtl8255(dev, 0x4, 0xe00);
-	write_rtl8255(dev, 0x4, 0xc00);
-	write_rtl8255(dev, 0x1, 0x0);
-	write_rtl8255(dev, 0x4, 0x800);
-	write_rtl8255(dev, 0x3, 0x0);
-	write_rtl8255(dev, 0x2, 0x0);
-	write_rtl8255(dev, 0x4, 0xa00);
-	write_rtl8255(dev, 0x4, 0x800);
-	write_rtl8255(dev, 0x4, 0x400);
-	write_rtl8255(dev, 0x3, 0x26);
-	write_rtl8255(dev, 0x2, 0x27);
-	write_rtl8255(dev, 0x4, 0x600);
-	write_rtl8255(dev, 0x4, 0x400);
-	write_rtl8255(dev, 0x4, 0x400);
-	write_rtl8255(dev, 0x3, 0x100);
-	write_rtl8255(dev, 0x4, 0x600);
-	write_rtl8255(dev, 0x4, 0x400);
-	write_rtl8255_reg0c(dev, 0x1554, 0xa800403b, 0xf6d44278, 0x804187ce, 0x80000027,
-		0x92402ac0, 0xf0009, 0x28000, 0xc00, 0x0);
-	write_rtl8255(dev, 0x1, 0x807);
-	write_rtl8255(dev, 0x4, 0xc01);
-	write_rtl8255(dev, 0x4, 0xe01);
-	write_rtl8255(dev, 0x4, 0xc01);
-	write_rtl8255(dev, 0x1, 0x0);
-	write_rtl8255(dev, 0x4, 0x801);
-	write_rtl8255(dev, 0x3, 0x0);
-	write_rtl8255(dev, 0x2, 0x0);
-	write_rtl8255(dev, 0x4, 0xa01);
-	write_rtl8255(dev, 0x4, 0x801);
-	write_rtl8255(dev, 0x4, 0x401);
-	write_rtl8255(dev, 0x3, 0x26);
-	write_rtl8255(dev, 0x2, 0x27);
-	write_rtl8255(dev, 0x4, 0x601);
-	write_rtl8255(dev, 0x4, 0x401);
-	write_rtl8255(dev, 0x4, 0x401);
-	write_rtl8255(dev, 0x3, 0x100);
-	write_rtl8255(dev, 0x4, 0x601);
-	write_rtl8255(dev, 0x4, 0x401);
-	write_rtl8255_reg0c(dev, 0x1554, 0xa800403b, 0xf6d44278, 0x80418bdf, 0x40000027,
-		0x92402ac4, 0xf0009, 0x28000, 0xc00, 0x0);
-	write_rtl8255(dev, 0x1, 0x807);
-	write_rtl8255(dev, 0x4, 0xc02);
-	write_rtl8255(dev, 0x4, 0xe02);
-	write_rtl8255(dev, 0x4, 0xc02);
-	write_rtl8255(dev, 0x1, 0x0);
-	write_rtl8255(dev, 0x4, 0x802);
-	write_rtl8255(dev, 0x3, 0x0);
-	write_rtl8255(dev, 0x2, 0x0);
-	write_rtl8255(dev, 0x4, 0xa02);
-	write_rtl8255(dev, 0x4, 0x802);
-	write_rtl8255(dev, 0x4, 0x402);
-	write_rtl8255(dev, 0x3, 0x26);
-	write_rtl8255(dev, 0x2, 0x26);
-	write_rtl8255(dev, 0x4, 0x602);
-	write_rtl8255(dev, 0x4, 0x402);
-	write_rtl8255(dev, 0x4, 0x402);
-	write_rtl8255(dev, 0x3, 0x100);
-	write_rtl8255(dev, 0x4, 0x602);
-	write_rtl8255(dev, 0x4, 0x402);
-	write_rtl8255_reg0c(dev, 0x1554, 0xa800403b, 0xf6d44278, 0x80418bbf, 0x40000027,
-		0x92402ac4, 0xf0009, 0x28000, 0xc00, 0x0);
-	write_rtl8255(dev, 0x1, 0x807);
-	write_rtl8255(dev, 0x4, 0xc03);
-	write_rtl8255(dev, 0x4, 0xe03);
-	write_rtl8255(dev, 0x4, 0xc03);
-	write_rtl8255(dev, 0x1, 0x0);
-	write_rtl8255(dev, 0x4, 0x803);
-	write_rtl8255(dev, 0x3, 0x0);
-	write_rtl8255(dev, 0x2, 0x0);
-	write_rtl8255(dev, 0x4, 0xa03);
-	write_rtl8255(dev, 0x4, 0x803);
-	write_rtl8255(dev, 0x4, 0x403);
-	write_rtl8255(dev, 0x3, 0x26);
-	write_rtl8255(dev, 0x2, 0x26);
-	write_rtl8255(dev, 0x4, 0x603);
-	write_rtl8255(dev, 0x4, 0x403);
-	write_rtl8255(dev, 0x4, 0x403);
-	write_rtl8255(dev, 0x3, 0x100);
-	write_rtl8255(dev, 0x4, 0x603);
-	write_rtl8255(dev, 0x4, 0x403);
-	write_rtl8255_reg0c(dev, 0x1554, 0xa800403b, 0xf6d44278, 0x80418b9f, 0x40000027,
-		0x92402ac8, 0xf0009, 0x28000, 0xc00, 0x0);
-	write_rtl8255(dev, 0x1, 0x807);
-	write_rtl8255(dev, 0x4, 0xc04);
-	write_rtl8255(dev, 0x4, 0xe04);
-	write_rtl8255(dev, 0x4, 0xc04);
-	write_rtl8255(dev, 0x1, 0x0);
-	write_rtl8255(dev, 0x4, 0x804);
-	write_rtl8255(dev, 0x3, 0x0);
-	write_rtl8255(dev, 0x2, 0x0);
-	write_rtl8255(dev, 0x4, 0xa04);
-	write_rtl8255(dev, 0x4, 0x804);
-	write_rtl8255(dev, 0x4, 0x404);
-	write_rtl8255(dev, 0x3, 0x26);
-	write_rtl8255(dev, 0x2, 0x26);
-	write_rtl8255(dev, 0x4, 0x604);
-	write_rtl8255(dev, 0x4, 0x404);
-	write_rtl8255(dev, 0x4, 0x404);
-	write_rtl8255(dev, 0x3, 0x100);
-	write_rtl8255(dev, 0x4, 0x604);
-	write_rtl8255(dev, 0x4, 0x404);
-	write_rtl8255_reg0c(dev, 0x1554, 0xa800403b, 0xf6d44278, 0x804183df, 0x40000027,
-		0x92402ac8, 0xf0009, 0x28000, 0xc00, 0x0);
-	write_rtl8255(dev, 0x1, 0x807);
-	write_rtl8255(dev, 0x4, 0xc05);
-	write_rtl8255(dev, 0x4, 0xe05);
-	write_rtl8255(dev, 0x4, 0xc05);
-	write_rtl8255(dev, 0x1, 0x0);
-	write_rtl8255(dev, 0x4, 0x805);
-	write_rtl8255(dev, 0x3, 0x0);
-	write_rtl8255(dev, 0x2, 0x0);
-	write_rtl8255(dev, 0x4, 0xa05);
-	write_rtl8255(dev, 0x4, 0x805);
-	write_rtl8255(dev, 0x4, 0x405);
-	write_rtl8255(dev, 0x3, 0x26);
-	write_rtl8255(dev, 0x2, 0x26);
-	write_rtl8255(dev, 0x4, 0x605);
-	write_rtl8255(dev, 0x4, 0x405);
-	write_rtl8255(dev, 0x4, 0x405);
-	write_rtl8255(dev, 0x3, 0x100);
-	write_rtl8255(dev, 0x4, 0x605);
-	write_rtl8255(dev, 0x4, 0x405);
-	write_rtl8255_reg0c(dev, 0x1554, 0xa800403b, 0xf6d44278, 0x804183cf, 0x27,
-		0x92402acc, 0xf0009, 0x28000, 0xc00, 0x0);
-	write_rtl8255(dev, 0x1, 0x807);
-	write_rtl8255(dev, 0x4, 0xc06);
-	write_rtl8255(dev, 0x4, 0xe06);
-	write_rtl8255(dev, 0x4, 0xc06);
-	write_rtl8255(dev, 0x1, 0x0);
-	write_rtl8255(dev, 0x4, 0x806);
-	write_rtl8255(dev, 0x3, 0x0);
-	write_rtl8255(dev, 0x2, 0x0);
-	write_rtl8255(dev, 0x4, 0xa06);
-	write_rtl8255(dev, 0x4, 0x806);
-	write_rtl8255(dev, 0x4, 0x406);
-	write_rtl8255(dev, 0x3, 0x25);
-	write_rtl8255(dev, 0x2, 0x26);
-	write_rtl8255(dev, 0x4, 0x606);
-	write_rtl8255(dev, 0x4, 0x406);
-	write_rtl8255(dev, 0x4, 0x406);
-	write_rtl8255(dev, 0x3, 0x100);
-	write_rtl8255(dev, 0x4, 0x606);
-	write_rtl8255(dev, 0x4, 0x406);
-	write_rtl8255_reg0c(dev, 0x1554, 0xa800403b, 0xf6d44278, 0x804183af, 0x27,
-		0x92402acc, 0xf0009, 0x28000, 0xc00, 0x0);
-	write_rtl8255(dev, 0x1, 0x807);
-	write_rtl8255(dev, 0x4, 0xc07);
-	write_rtl8255(dev, 0x4, 0xe07);
-	write_rtl8255(dev, 0x4, 0xc07);
-	write_rtl8255(dev, 0x1, 0x0);
-	write_rtl8255(dev, 0x4, 0x807);
-	write_rtl8255(dev, 0x3, 0x0);
-	write_rtl8255(dev, 0x2, 0x0);
-	write_rtl8255(dev, 0x4, 0xa07);
-	write_rtl8255(dev, 0x4, 0x807);
-	write_rtl8255(dev, 0x4, 0x407);
-	write_rtl8255(dev, 0x3, 0x25);
-	write_rtl8255(dev, 0x2, 0x26);
-	write_rtl8255(dev, 0x4, 0x607);
-	write_rtl8255(dev, 0x4, 0x407);
-	write_rtl8255(dev, 0x4, 0x407);
-	write_rtl8255(dev, 0x3, 0x100);
-	write_rtl8255(dev, 0x4, 0x607);
-	write_rtl8255(dev, 0x4, 0x407);
-	write_rtl8255_reg0c(dev, 0x1554, 0xa800403b, 0xf6d44278, 0x804083d7, 0x40000027,
-		0x92402ad0, 0xf0009, 0x28000, 0xc00, 0x0);
-	write_rtl8255(dev, 0x1, 0x807);
-	write_rtl8255(dev, 0x4, 0xc08);
-	write_rtl8255(dev, 0x4, 0xe08);
-	write_rtl8255(dev, 0x4, 0xc08);
-	write_rtl8255(dev, 0x1, 0x0);
-	write_rtl8255(dev, 0x4, 0x808);
-	write_rtl8255(dev, 0x3, 0x0);
-	write_rtl8255(dev, 0x2, 0x0);
-	write_rtl8255(dev, 0x4, 0xa08);
-	write_rtl8255(dev, 0x4, 0x808);
-	write_rtl8255(dev, 0x4, 0x408);
-	write_rtl8255(dev, 0x3, 0x25);
-	write_rtl8255(dev, 0x2, 0x26);
-	write_rtl8255(dev, 0x4, 0x608);
-	write_rtl8255(dev, 0x4, 0x408);
-	write_rtl8255(dev, 0x4, 0x408);
-	write_rtl8255(dev, 0x3, 0x100);
-	write_rtl8255(dev, 0x4, 0x608);
-	write_rtl8255(dev, 0x4, 0x408);
-	write_rtl8255_reg0c(dev, 0x1554, 0xa800403b, 0xf6d44278, 0x804083c7, 0x27,
-		0x92402ad0, 0xf0009, 0x28000, 0xc00, 0x0);
-	write_rtl8255(dev, 0x1, 0x807);
-	write_rtl8255(dev, 0x4, 0xc09);
-	write_rtl8255(dev, 0x4, 0xe09);
-	write_rtl8255(dev, 0x4, 0xc09);
-	write_rtl8255(dev, 0x1, 0x0);
-	write_rtl8255(dev, 0x4, 0x809);
-	write_rtl8255(dev, 0x3, 0x0);
-	write_rtl8255(dev, 0x2, 0x0);
-	write_rtl8255(dev, 0x4, 0xa09);
-	write_rtl8255(dev, 0x4, 0x809);
-	write_rtl8255(dev, 0x4, 0x409);
-	write_rtl8255(dev, 0x3, 0x25);
-	write_rtl8255(dev, 0x2, 0x26);
-	write_rtl8255(dev, 0x4, 0x609);
-	write_rtl8255(dev, 0x4, 0x409);
-	write_rtl8255(dev, 0x4, 0x409);
-	write_rtl8255(dev, 0x3, 0x100);
-	write_rtl8255(dev, 0x4, 0x609);
-	write_rtl8255(dev, 0x4, 0x409);
-	write_rtl8255_reg0c(dev, 0x1554, 0xa800403b, 0xf6d44278, 0x804043d7, 0x40000027,
-		0x92402ad4, 0xf0009, 0x28000, 0xc00, 0x0);
-	write_rtl8255(dev, 0x1, 0x807);
-	write_rtl8255(dev, 0x4, 0xc0a);
-	write_rtl8255(dev, 0x4, 0xe0a);
-	write_rtl8255(dev, 0x4, 0xc0a);
-	write_rtl8255(dev, 0x1, 0x0);
-	write_rtl8255(dev, 0x4, 0x80a);
-	write_rtl8255(dev, 0x3, 0x0);
-	write_rtl8255(dev, 0x2, 0x0);
-	write_rtl8255(dev, 0x4, 0xa0a);
-	write_rtl8255(dev, 0x4, 0x80a);
-	write_rt