diff options
| author | Ben Widawsky <benjamin.widawsky@intel.com> | 2014-03-31 17:16:43 -0700 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-04-01 22:58:28 +0200 |
| commit | 50e6a2a74413806bd7fefb2a9aa4044aa49d3924 (patch) | |
| tree | 6dc08b16c4cd00587b96b4c3dab5ad9ad2d0dbb7 | |
| parent | 3280e8b08fd0647629530c27cd36b37982a3b597 (diff) | |
drm/i915/bdw: RPS frequency bits are the same as HSW
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 98abacd251b..cebe0d42a78 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3041,7 +3041,7 @@ void gen6_set_rps(struct drm_device *dev, u8 val) if (val != dev_priv->rps.cur_freq) { gen6_set_rps_thresholds(dev_priv, val); - if (IS_HASWELL(dev)) + if (IS_HASWELL(dev) || IS_BROADWELL(dev)) I915_WRITE(GEN6_RPNSWREQ, HSW_FREQUENCY(val)); else |