diff options
author | Rahul Sharma <rahul.sharma@samsung.com> | 2013-07-25 10:37:34 +0530 |
---|---|---|
committer | Mike Turquette <mturquette@linaro.org> | 2013-07-30 14:09:41 -0700 |
commit | 4a453314883d9d0a500107b508500ffffdca2f6d (patch) | |
tree | 7b8a1260d9ff977bc58428ea733f5f70e2d10331 | |
parent | 93b10d1b94341afc87f1bd0efe9b516b9d0fe00f (diff) |
clk/exynos5250: add mout_hdmi mux clock for hdmi
hdmi driver needs to change the parent of hdmi clock
frequently between pixel clock and hdmiphy clock. hdmiphy is
not stable after power on and for a short interval while changing
the phy configuration. For this duration pixel clock is used to
clock hdmi.
This patch is exposing the mux for changing parent.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
-rw-r--r-- | Documentation/devicetree/bindings/clock/exynos5250-clock.txt | 8 | ||||
-rw-r--r-- | drivers/clk/samsung/clk-exynos5250.c | 5 |
2 files changed, 12 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt index 2d4a7151180..76b97c92870 100644 --- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt @@ -159,6 +159,14 @@ clock which they consume. hdmi 344 g2d 345 + + [Clock Muxes] + + Clock ID + ---------------------------- + mout_hdmi 1024 + + Example 1: An example of a clock controller node is listed below. clock: clock-controller@0x10010000 { diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index e6a4be16272..397f1ca41b9 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -102,6 +102,9 @@ enum exynos5250_clks { tzpc2, tzpc3, tzpc4, tzpc5, tzpc6, tzpc7, tzpc8, tzpc9, hdmi_cec, mct, wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi, g2d, + /* mux clocks */ + mout_hdmi = 1024, + nr_clks, }; @@ -234,7 +237,7 @@ static struct samsung_mux_clock exynos5250_mux_clks[] __initdata = { MUX(none, "mout_fimd1", mout_group1_p, SRC_DISP1_0, 0, 4), MUX(none, "mout_mipi1", mout_group1_p, SRC_DISP1_0, 12, 4), MUX(none, "mout_dp", mout_group1_p, SRC_DISP1_0, 16, 4), - MUX(none, "mout_hdmi", mout_hdmi_p, SRC_DISP1_0, 20, 1), + MUX(mout_hdmi, "mout_hdmi", mout_hdmi_p, SRC_DISP1_0, 20, 1), MUX(none, "mout_audio0", mout_audio0_p, SRC_MAU, 0, 4), MUX(none, "mout_mmc0", mout_group1_p, SRC_FSYS, 0, 4), MUX(none, "mout_mmc1", mout_group1_p, SRC_FSYS, 4, 4), |