x86: rename ->ESR_DISABLE to ->disable_esr

the ->ESR_DISABLE shouting variant was used to enable the esr_disable
macro wrappers. Those ugly macros are removed now so we can rename
->ESR_DISABLE to ->disable_esr

Signed-off-by: Ingo Molnar <mingo@elte.hu>

11 files changed, 13 insertions, 13 deletions

diff --git a/arch/x86/include/asm/genapic.h b/arch/x86/include/asm/genapic.h
index e998e3df5d2..7aee4a4c524 100644
--- a/arch/x86/include/asm/genapic.h
+++ b/arch/x86/include/asm/genapic.h
@@ -28,7 +28,7 @@ struct genapic {
 
 	const struct cpumask *(*target_cpus)(void);
 
-	int ESR_DISABLE;
+	int disable_esr;
 
 	int apic_destination_logical;
 	unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic.c
index 69d8c30d571..3853ed76c88 100644
--- a/arch/x86/kernel/apic.c
+++ b/arch/x86/kernel/apic.c
@@ -1107,7 +1107,7 @@ static void __cpuinit lapic_setup_esr(void)
 		return;
 	}
 
-	if (apic->ESR_DISABLE) {
+	if (apic->disable_esr) {
 		/*
 		 * Something untraceable is creating bad interrupts on
 		 * secondary quads ... for the moment, just leave the
@@ -1157,7 +1157,7 @@ void __cpuinit setup_local_APIC(void)
 
 #ifdef CONFIG_X86_32
 	/* Pound the ESR really hard over the head with a big hammer - mbligh */
-	if (lapic_is_integrated() && apic->ESR_DISABLE) {
+	if (lapic_is_integrated() && apic->disable_esr) {
 		apic_write(APIC_ESR, 0);
 		apic_write(APIC_ESR, 0);
 		apic_write(APIC_ESR, 0);
diff --git a/arch/x86/kernel/genapic_flat_64.c b/arch/x86/kernel/genapic_flat_64.c
index 0a263d6bb5e..d437a60cc58 100644
--- a/arch/x86/kernel/genapic_flat_64.c
+++ b/arch/x86/kernel/genapic_flat_64.c
@@ -184,7 +184,7 @@ struct genapic apic_flat =  {
 	.irq_dest_mode			= (APIC_DEST_LOGICAL != 0),
 
 	.target_cpus			= flat_target_cpus,
-	.ESR_DISABLE			= 0,
+	.disable_esr			= 0,
 	.apic_destination_logical	= 0,
 	.check_apicid_used		= NULL,
 	.check_apicid_present		= NULL,
@@ -330,7 +330,7 @@ struct genapic apic_physflat =  {
 	.irq_dest_mode			= (APIC_DEST_PHYSICAL != 0),
 
 	.target_cpus			= physflat_target_cpus,
-	.ESR_DISABLE			= 0,
+	.disable_esr			= 0,
 	.apic_destination_logical	= 0,
 	.check_apicid_used		= NULL,
 	.check_apicid_present		= NULL,
diff --git a/arch/x86/kernel/genx2apic_cluster.c b/arch/x86/kernel/genx2apic_cluster.c
index e9ff7dc9a0f..c1cffae4a4c 100644
--- a/arch/x86/kernel/genx2apic_cluster.c
+++ b/arch/x86/kernel/genx2apic_cluster.c
@@ -186,7 +186,7 @@ struct genapic apic_x2apic_cluster = {
 	.irq_dest_mode			= (APIC_DEST_LOGICAL != 0),
 
 	.target_cpus			= x2apic_target_cpus,
-	.ESR_DISABLE			= 0,
+	.disable_esr			= 0,
 	.apic_destination_logical	= 0,
 	.check_apicid_used		= NULL,
 	.check_apicid_present		= NULL,
diff --git a/arch/x86/kernel/genx2apic_phys.c b/arch/x86/kernel/genx2apic_phys.c
index 8141b5a88f6..c59602be035 100644
--- a/arch/x86/kernel/genx2apic_phys.c
+++ b/arch/x86/kernel/genx2apic_phys.c
@@ -182,7 +182,7 @@ struct genapic apic_x2apic_phys = {
 	.irq_dest_mode			= (APIC_DEST_PHYSICAL != 0),
 
 	.target_cpus			= x2apic_target_cpus,
-	.ESR_DISABLE			= 0,
+	.disable_esr			= 0,
 	.apic_destination_logical	= 0,
 	.check_apicid_used		= NULL,
 	.check_apicid_present		= NULL,
diff --git a/arch/x86/kernel/genx2apic_uv_x.c b/arch/x86/kernel/genx2apic_uv_x.c
index 6a73cad0d3e..525b4e480a7 100644
--- a/arch/x86/kernel/genx2apic_uv_x.c
+++ b/arch/x86/kernel/genx2apic_uv_x.c
@@ -247,7 +247,7 @@ struct genapic apic_x2apic_uv_x = {
 	.irq_dest_mode			= (APIC_DEST_PHYSICAL != 0),
 
 	.target_cpus			= uv_target_cpus,
-	.ESR_DISABLE			= 0,
+	.disable_esr			= 0,
 	.apic_destination_logical	= 0,
 	.check_apicid_used		= NULL,
 	.check_apicid_present		= NULL,
diff --git a/arch/x86/mach-generic/bigsmp.c b/arch/x86/mach-generic/bigsmp.c
index f0bb72674f7..fe9bf252c06 100644
--- a/arch/x86/mach-generic/bigsmp.c
+++ b/arch/x86/mach-generic/bigsmp.c
@@ -69,7 +69,7 @@ struct genapic apic_bigsmp = {
 	.irq_dest_mode			= 0,
 
 	.target_cpus			= bigsmp_target_cpus,
-	.ESR_DISABLE			= 1,
+	.disable_esr			= 1,
 	.apic_destination_logical	= APIC_DEST_LOGICAL,
 	.check_apicid_used		= check_apicid_used,
 	.check_apicid_present		= check_apicid_present,
diff --git a/arch/x86/mach-generic/default.c b/arch/x86/mach-generic/default.c
index c30141a9aca..d3fe8017e94 100644
--- a/arch/x86/mach-generic/default.c
+++ b/arch/x86/mach-generic/default.c
@@ -36,7 +36,7 @@ struct genapic apic_default = {
 	.irq_dest_mode			= 1,
 
 	.target_cpus			= default_target_cpus,
-	.ESR_DISABLE			= 0,
+	.disable_esr			= 0,
 	.apic_destination_logical	= APIC_DEST_LOGICAL,
 	.check_apicid_used		= check_apicid_used,
 	.check_apicid_present		= check_apicid_present,
diff --git a/arch/x86/mach-generic/es7000.c b/arch/x86/mach-generic/es7000.c
index e8aa8fd4f49..b4f8abfb714 100644
--- a/arch/x86/mach-generic/es7000.c
+++ b/arch/x86/mach-generic/es7000.c
@@ -112,7 +112,7 @@ struct genapic apic_es7000 = {
 	.irq_dest_mode			= 0,
 
 	.target_cpus			= es7000_target_cpus,
-	.ESR_DISABLE			= 1,
+	.disable_esr			= 1,
 	.apic_destination_logical	= APIC_DEST_LOGICAL,
 	.check_apicid_used		= check_apicid_used,
 	.check_apicid_present		= check_apicid_present,
diff --git a/arch/x86/mach-generic/numaq.c b/arch/x86/mach-generic/numaq.c
index 860edc8bd90..f3b7840d227 100644
--- a/arch/x86/mach-generic/numaq.c
+++ b/arch/x86/mach-generic/numaq.c
@@ -56,7 +56,7 @@ struct genapic apic_numaq = {
 	.irq_dest_mode			= 0,
 
 	.target_cpus			= numaq_target_cpus,
-	.ESR_DISABLE			= 1,
+	.disable_esr			= 1,
 	.apic_destination_logical	= APIC_DEST_LOGICAL,
 	.check_apicid_used		= check_apicid_used,
 	.check_apicid_present		= check_apicid_present,
diff --git a/arch/x86/mach-generic/summit.c b/arch/x86/mach-generic/summit.c
index cd5ef115a4e..95e075b61bd 100644
--- a/arch/x86/mach-generic/summit.c
+++ b/arch/x86/mach-generic/summit.c
@@ -49,7 +49,7 @@ struct genapic apic_summit = {
 	.irq_dest_mode			= 1,
 
 	.target_cpus			= summit_target_cpus,
-	.ESR_DISABLE			= 1,
+	.disable_esr			= 1,
 	.apic_destination_logical	= APIC_DEST_LOGICAL,
 	.check_apicid_used		= check_apicid_used,
 	.check_apicid_present		= check_apicid_present,