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path: root/test/MC/Disassembler/XCore/xcore.txt
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# RUN: llvm-mc --disassemble %s -triple=xcore-xmos-elf | FileCheck %s
# CHECK: .section        __TEXT,__text,regular,pure_instructions

# 0r instructions

# CHECK: clre
0xed 0x07

# CHECK: get r11, id
0xee 0x17

# CHECK: get r11, ed
0xfe 0x0f

# CHECK: get r11, et
0xff 0x0f

# CHECK: ssync
0xee 0x07

# CHECK: waiteu
0xec 0x07

# 1r instructions

# CHECK: msync res[r0]
0xf0 0x1f

# CHECK: mjoin res[r1]
0xf1 0x17

# CHECK: bau r2
0xf2 0x27

# CHECK: set sp, r3
0xf3 0x2f

# CHECK: ecallt r4
0xf4 0x4f

# CHECK: ecallf r5
0xe5 0x4f

# CHECK: bla r6
0xe6 0x27

# CHECK: syncr res[r7]
0xf7 0x87

# CHECK: freer res[r8]
0xe8 0x17

# CHECK: setv res[r9], r11
0xf9 0x47

# CHECK: setev res[r10], r11
0xfa 0x3f

# CHECK: eeu res[r11]
0xfb 0x07

# 2r instructions

# CHECK: not r1, r8
0x24 0x8f

# CHECK: neg r7, r6
0xce 0x97

# CHECK: andnot r10, r11
0xab 0x2f

# CHECK: mkmsk r11, r0
0x4c 0xa7

# CHECK: getts r8, res[r1]
0x41 0x3f

# CHECK: setpt res[r2], r3
0xde 0x3e

# CHECK: outct res[r1], r2
0xc6 0x4e

# CHECK: outt res[r5], r4
0xd1 0x0f

# CHECK: out res[r9], r10
0xa9 0xaf

# CHECK: outshr res[r0], r2
0xd8 0xae

# CHECK: inct r7, res[r4]
0xdc 0x87

# CHECK: int r8, res[r3]
0x53 0x8f

# CHECK: in r10, res[r0]
0x48 0xb7

# CHECK: inshr r4, res[r2]
0x12 0xb7

# CHECK: chkct res[r6], r0
0x08 0xcf

# CHECK: testct r8, res[r3]
0x53 0xbf

# CHECK: testwct r2, res[r9]
0x39 0xc7

# CHECK: setd res[r3], r4
0x13 0x17

# CHECK: getst r7, res[r1]
0x1d 0x07

# CHECK: init t[r1]:sp, r2
0xc9 0x16

# CHECK: init t[r10]:pc, r1
0x26 0x07

# CHECK: init t[r2]:cp, r10
0x4a 0x1f

# CHECK: init t[r2]:dp, r3
0xce 0x0e

# CHECK: setpsc res[r8], r2
0x28 0xc7

# CHECK: zext r3, r8
0x2c 0x47

# CHECK: sext r9, r1
0x45 0x37

# rus instructions

# CHECK: chkct res[r1], 8
0x34 0xcf

# CHECK: getr r11, 2
0x4e 0x87

# CHECK: mkmsk r4, 24
0x72 0xa7

# CHECK: outct res[r3], r0
0xcc 0x4e

# CHECK: sext r8, 16
0xb1 0x37

# CHECK: zext r2, 32
0xd8 0x46

# CHECK: peek r0, res[r5]
0x81 0xbf

# CHECK: endin r10, res[r1]
0x59 0x97

# l2r instructions

# CHECK: bitrev r1, r10
0x26 0xff 0xec 0x07

# CHECK: byterev r4, r1
0x11 0xff 0xec 0x07

# CHECK: clz r11, r10
0xae 0xff 0xec 0x0f

# CHECK: get r3, ps[r6]
0x9e 0xff 0xec 0x17

# CHECK: setc res[r5], r9
0x75 0xff 0xec 0x2f

# CHECK: init t[r2]:lr, r1
0xc6 0xfe 0xec 0x17

# CHECK: setclk res[r2], r1
0xd6 0xfe 0xec 0x0f

# CHECK: set ps[r9], r10
0xa9 0xff 0xec 0x1f

# CHECK: setrdy res[r3], r1
0xc7 0xfe 0xec 0x2f

# CHECK: settw res[r7], r2
0x9b 0xff 0xec 0x27

# 3r instructions

# CHECK: add r1, r2, r3
0x1b 0x10

# CHECK: and r11, r10, r9
0xb9 0x3e

# CHECK: eq r6, r1, r2
0x66 0x30

# CHECK: ld16s r8, r3[r4]
0xcc 0x82

# CHECK: ld8u r9, r1[r10]
0x16 0x8d

# CHECK: ldw r9, r4[r5]
0x91 0x4b

# CHECK: lss r7, r3, r0
0x7c 0xc0

# CHECK: lsu r5, r8, r6
0x12 0xcc

# CHECK: or r1, r3, r2
0x1e 0x40

# CHECK: shl r8, r2, r4
0xc8 0x22

# CHECK: shr r9, r7, r1
0x5d 0x29

# CHECK: sub r4, r2, r5
0x89 0x1a

# 2rus instructions

# CHECK: add r10, r2, 5
0xe9 0x92

# CHECK: eq r2, r1, 0
0x24 0xb0

# CHECK: ldw r5, r6[1]
0x19 0x09

# CHECK: shl r6, r5, 24
0xa6 0xa5

# CHECK: shr r3, r8, 5
0xf1 0xab

# CHECK: stw r3, r2[0]
0x38 0x00

# CHECK: sub r2, r4, 11
0x63 0x9d