invalid-MRRC2-arm.txt « ARM « Disassembler « MC « test - emscripten-fastcomp - LLVM with the emscripten fastcomp javascript backend

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# RUN: llvm-mc --disassemble %s -triple=armv7-linux-gnueabi 2>&1 | FileCheck %s

# CHECK: invalid instruction encoding
0x00 0x1a 0x50 0xfc