blob: c8ea2829c467d4f0412340bfce9d23053b583ff5 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
|
//===-- PPC.h - Top-level interface for PowerPC Target ----------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains the entry points for global functions defined in the LLVM
// PowerPC back-end.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TARGET_POWERPC_H
#define LLVM_TARGET_POWERPC_H
#include <iosfwd>
// GCC #defines PPC on Linux but we use it as our namespace name
#undef PPC
namespace llvm {
class PPCTargetMachine;
class FunctionPassManager;
class FunctionPass;
class MachineCodeEmitter;
namespace PPC {
/// Predicate - These are "(BO << 5) | BI" for various predicates.
enum Predicate {
PRED_ALWAYS = (20 << 5) | 0,
PRED_LT = (12 << 5) | 0,
PRED_LE = ( 4 << 5) | 1,
PRED_EQ = (12 << 5) | 2,
PRED_GE = ( 4 << 5) | 0,
PRED_GT = (12 << 5) | 1,
PRED_NE = ( 4 << 5) | 2,
PRED_UN = (12 << 5) | 3,
PRED_NU = ( 4 << 5) | 3
};
}
FunctionPass *createPPCBranchSelectionPass();
FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
FunctionPass *createPPCAsmPrinterPass(std::ostream &OS,
PPCTargetMachine &TM);
FunctionPass *createPPCCodeEmitterPass(PPCTargetMachine &TM,
MachineCodeEmitter &MCE);
void addPPCMachOObjectWriterPass(FunctionPassManager &FPM, std::ostream &o,
PPCTargetMachine &tm);
} // end namespace llvm;
// Defines symbolic names for PowerPC registers. This defines a mapping from
// register name to register number.
//
#include "PPCGenRegisterNames.inc"
// Defines symbolic names for the PowerPC instructions.
//
#include "PPCGenInstrNames.inc"
#endif
|
