//===- AlphaISelPattern.cpp - A pattern matching inst selector for Alpha --===//// // The LLVM Compiler Infrastructure//// This file was developed by the LLVM research group and is distributed under// the University of Illinois Open Source License. See LICENSE.TXT for details.// //===----------------------------------------------------------------------===////// This file defines a pattern matching instruction selector for Alpha.////===----------------------------------------------------------------------===//#include"Alpha.h"#include"AlphaRegisterInfo.h"#include"llvm/Constants.h" // FIXME: REMOVE#include"llvm/Function.h"#include"llvm/CodeGen/MachineInstrBuilder.h"#include"llvm/CodeGen/MachineConstantPool.h" // FIXME: REMOVE#include"llvm/CodeGen/MachineFunction.h"#include"llvm/CodeGen/MachineFrameInfo.h"#include"llvm/CodeGen/SelectionDAG.h"#include"llvm/CodeGen/SelectionDAGISel.h"#include"llvm/CodeGen/SSARegMap.h"#include"llvm/Target/TargetData.h"#include"llvm/Target/TargetLowering.h"#include"llvm/Support/MathExtras.h"#include"llvm/ADT/Statistic.h"#include<set>#include<algorithm>usingnamespacellvm;//===----------------------------------------------------------------------===//// AlphaTargetLowering - Alpha Implementation of the TargetLowering interfacenamespace{classAlphaTargetLowering:publicTargetLowering{intVarArgsFrameIndex;// FrameIndex for start of varargs area.unsignedGP;//GOT vregpublic:AlphaTargetLowering(TargetMachine&TM):TargetLowering(TM){// Set up the TargetLowering object.//I am having problems with shr n ubyte 1setShiftAmountType(MVT::i64);setSetCCResultType(MVT::i64);addRegisterClass(MV