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AgeCommit message (Expand)Author
2011-03-18Thumb2 PC-relative loads require a fixup rather than just an immediate.Owen Anderson
2011-03-15- Add "Bitcast" target instruction property for instructions which performEvan Cheng
2011-03-15X86 table-generator and disassembler support for the AVXSean Callanan
2011-03-14Ignore isCodeGenOnly instructions when generating diassembly tables.Owen Anderson
2011-03-14Trailing whitespace.Jim Grosbach
2011-03-14Correct small comment order typo.Francois Pichet
2011-03-12Remove no-longer-correct special case for disasm of ARM BL instructions.Jim Grosbach
2011-03-11Pseudo-ize the ARM 'B' instruction.Jim Grosbach
2011-03-11Remove dead code. These ARM instruction definitions no longer exist.Jim Grosbach
2011-03-11Remove dead code. These ARM instruction definitions no longer exist.Jim Grosbach
2011-03-11Pseudo-ize VMOVDcc and VMOVScc.Jim Grosbach
2011-03-11Remove dead code. These ARM instruction definitions don't exist.Jim Grosbach
2011-03-11ARM VDUPfd and VDUPfq can just be patterns. The instruction is the sameJim Grosbach
2011-03-11Remove dead code. These ARM instruction definitions don't exist.Jim Grosbach
2011-03-11ARM VDUPLNfq and VDUPLNfd definitions can just be Pat<>s for VDUPLN32qJim Grosbach
2011-03-11ARM VREV64df and VREV64qf can just be patterns. The instruction is the sameJim Grosbach
2011-03-11Add missing 'return on failure'. Previously we'd crash after emittingJim Grosbach
2011-03-11Teach TableGen to pre-calculate register enum values when creating theJim Grosbach
2011-03-11Make the register enum value part of the CodeGenRegister struct.Jim Grosbach
2011-03-11Trailing whitespace.Jim Grosbach
2011-03-11Trailing whitespace.Jim Grosbach
2011-03-11Tidy up since ARM MOVCCi and MOVCCi16 are now pseudos.Jim Grosbach
2011-03-10Properly pseudo-ize MOVCCr and MOVCCs.Jim Grosbach
2011-03-10Memory barrier instructions don't need special handling in tblgen anymore.Jim Grosbach
2011-03-07Rename the narrow shift right immediate operands to "shr_imm*" operands. AlsoBill Wendling
2011-03-03TableGen should not ignore BX instructions for the ARM disassembler. pr9368.Bob Wilson
2011-03-03pr9367: Add missing predicated BLX instructions.Bob Wilson
2011-03-02Teach the clang attribute emitter about InheritableParamAttr.John McCall
2011-03-01trailing whitespace.Jim Grosbach
2011-03-01Generalize the register matching code in DAGISel a bit.Jim Grosbach
2011-03-01Narrow right shifts need to encode their immediates differently from a normalBill Wendling
2011-02-26A new TableGen feature! (Not turned on just yet.)Bill Wendling
2011-02-24In utils/TableGen/ClangSACheckersEmitter.cpp, set the 'Hidden' bit for checkers.Argyrios Kyrtzidis
2011-02-22Implement xgetbv and xsetbv.Rafael Espindola
2011-02-20Put targets on folders, if the IDE supports the feature.Oscar Fuentes
2011-02-18CMake: updated list of tblgen source files.Oscar Fuentes
2011-02-18Add FixedLenDecoderEmitter, the skeleton of a new disassembler emitter for fi...Owen Anderson
2011-02-17Check that MnemonicAlias doesn't map back to the same string.Joerg Sonnenberger
2011-02-17Add serialization for Expr* arguments for attributes to clang tablegen files.Sean Hunt
2011-02-15When tablegen'ing the clang analyzer checkers:Argyrios Kyrtzidis
2011-02-14Add the ClangSACheckersEmitter tablegen backend which will be used for the cl...Argyrios Kyrtzidis
2011-02-14Fix encoding and add parsing support for the arm/thumb CPS instruction:Bruno Cardoso Lopes
2011-02-13Wrap the struct in an anonymous namespace.Argyrios Kyrtzidis
2011-02-12AsmMatcher custom operand parser failure enhancements.Jim Grosbach
2011-02-11Tidy out asm matcher .inc output.Jim Grosbach
2011-02-10Don't return before calling the post-processing function(s).Bill Wendling
2011-02-10Do AsmMatcher operand classification per-opcode.Jim Grosbach
2011-02-07Implement support for custom target specific asm parsing of operands.Bruno Cardoso Lopes
2011-02-04MC/AsmMatcher: Sink ConvertToMCInst into the TargetAsmParser instance, whichDaniel Dunbar
2011-02-04Teach ARM/MC/ELF to handle R_ARM_JUMP24 relocation type for conditional jumps.Jason W Kim
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