emscripten-fastcomp - LLVM with the emscripten fastcomp javascript backend

Age	Commit message (Expand)	Author
2007-07-20	No need for noResults anymore.	Evan Cheng
2007-07-19	Change instruction description to split OperandList into OutOperandList and	Evan Cheng
2007-07-10	Try committing again. Add OptionalDefOperand. Remove clobbersPred.	Evan Cheng
2007-06-26	Revert the earlier change that removed the M_REMATERIALIZABLE machine	Dan Gohman
2007-06-19	Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad	Dan Gohman
2007-06-19	Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit.	Evan Cheng
2007-06-06	Add clobbersPred - instruction that clobbers condition code / register which ...	Evan Cheng
2007-05-16	Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable wit...	Evan Cheng
2007-03-19	Recognize target instruction flag 'isReMaterializable'.	Evan Cheng
2006-11-15	Remove the isTwoAddress property from the CodeGenInstruction class. It should	Chris Lattner
2006-11-15	ADd support for adding constraints to suboperands	Chris Lattner
2006-11-06	simplify the way operand flags and constraints are handled, making it easier	Chris Lattner
2006-11-06	recognize ppc's blr instruction as predicated	Chris Lattner
2006-11-05	Unbreak VC++ build.	Jeff Cohen
2006-11-01	Add operand constraints to TargetInstrInfo.	Evan Cheng
2006-01-09	* Remove instruction fields hasInFlag / hasOutFlag and added SNDPInFlag and	Evan Cheng
2005-12-26	Added field noResults to Instruction.	Evan Cheng
2005-12-23	* Support for hasInFlag and hasOutFlag (on instructions). Remove nameless FLAG	Evan Cheng
2005-12-04	* Commit the fix (by Chris) for a tblgen type inferencing bug.	Evan Cheng
2005-12-01	Nuke CodeGenInstruction's ValueType member, it is no longer used.	Nate Begeman
2005-11-30	fit into 80 columns	Nate Begeman
2005-11-19	Teach tblgen about instruction operands that have multiple MachineInstr	Chris Lattner
2005-08-26	spell this variable right	Chris Lattner
2005-08-26	Expose a new flag to TargetInstrInfo	Chris Lattner
2005-08-19	For now, just emit empty operand info structures.	Chris Lattner
2005-08-18	Figure out how many operands each instruction has, keep track of whether	Chris Lattner
2005-04-22	Remove trailing whitespace	Misha Brukman
2005-01-02	Expose isConvertibleToThreeAddress and isCommutable bits to the code generator.	Chris Lattner
2004-09-28	Add support for the isLoad and isStore flags, needed by the instruction sched...	Nate Begeman
2004-09-28	Turn the hasDelaySlot flag into the M_DELAY_SLOT_FLAG	Chris Lattner
2004-08-14	Make the AsmWriter a first-class tblgen object. Allow targets to specify	Chris Lattner
2004-08-11	Start parsing more information from the Operand information	Chris Lattner
2004-08-01	Parse the operand list of the instruction. We currently support register and...	Chris Lattner
2004-08-01	Add, and start using, the CodeGenInstruction class. This class represents	Chris Lattner