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2011-03-15Add XCore intrinsics for getps, setps, setsr and clrsr.Richard Osborne
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127678 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-15PTX: Set PTX 2.0 as the minimum supported versionJustin Holewinski
- Remove PTX 1.4 code generation - Change type of intrinsics to .v4.i32 instead of .v4.i16 - Add and/or/xor integer instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127677 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-15Add a peephole optimization to optimize pairs of bitcasts. e.g.Evan Cheng
v2 = bitcast v1 ... v3 = bitcast v2 ... = v3 => v2 = bitcast v1 ... = v1 if v1 and v3 are of in the same register class. bitcast between i32 and fp (and others) are often not nops since they are in different register classes. These bitcast instructions are often left because they are in different basic blocks and cannot be eliminated by dag combine. rdar://9104514 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127668 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-15sext(undef) = 0, because the top bits will all be the same.Evan Cheng
zext(undef) = 0, because the top bits will be zero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127649 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-15Testcase for r127630.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127648 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-15Clean up ARM tail calls a bit. They're pseudo-instructions for normal branches.Jim Grosbach
Also more cleanly separate the ARM vs. Thumb functionality. Previously, the encoding would be incorrect for some Thumb instructions (the indirect calls). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127637 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14Generate a VTBL instruction instead of a series of loads and stores when weBill Wendling
can. As Nate pointed out, VTBL isn't super performant, but it *has* to be better than this: _shuf: @ BB#0: @ %entry push {r4, r7, lr} add r7, sp, #4 sub sp, #12 mov r4, sp bic r4, r4, #7 mov sp, r4 mov r2, sp vmov d16, r0, r1 orr r0, r2, #6 orr r3, r2, #7 vst1.8 {d16[0]}, [r3] vst1.8 {d16[5]}, [r0] subs r4, r7, #4 orr r0, r2, #5 vst1.8 {d16[4]}, [r0] orr r0, r2, #4 vst1.8 {d16[4]}, [r0] orr r0, r2, #3 vst1.8 {d16[0]}, [r0] orr r0, r2, #2 vst1.8 {d16[2]}, [r0] orr r0, r2, #1 vst1.8 {d16[1]}, [r0] vst1.8 {d16[3]}, [r2] vldr.64 d16, [sp] vmov r0, r1, d16 mov sp, r4 pop {r4, r7, pc} The "illegal" testcase in vext.ll is no longer illegal. <rdar://problem/9078775> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127630 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14Fix this test up a bit.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127621 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14Minor optimization. sign-ext/anyext of undef is still undef.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127598 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14PTX: Emit global arrays with proper sizesJustin Holewinski
- Emit all arrays as type .b8 and proper sizes in bytes to conform to the output of nvcc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127584 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14PTX: Add support for sqrt/sin/cos intrinsicsJustin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127578 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-14ptx: add set.p instruction and related changes to predicate executionChe-Liang Chiou
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127577 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-12Saving files before committing is overrated.Eric Christopher
Add a RUN line to this test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127520 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-12Sometimes isPredicable lies to us and tells us we don't need the operands.Eric Christopher
Go ahead and add them on when we might want to use them and let later passes remove them. Fixes rdar://9118569 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127518 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Properly pseudo-ize the ARM LDMIA_RET instruction. This has the nice side-Jim Grosbach
effect that we get proper instruction printing using the "pop" mnemonic for it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127502 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Roll r127459 back in:Cameron Zwarich
Optimize trivial branches in CodeGenPrepare, which often get created from the lowering of objectsize intrinsics. Unfortunately, a number of tests were relying on llc not optimizing trivial branches, so I had to add an option to allow them to continue to test what they originally tested. This fixes <rdar://problem/8785296> and <rdar://problem/9112893>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127498 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Fix the GCC test suite issue exposed by r127477, which was caused by stackCameron Zwarich
protector insertion not working correctly with unreachable code. Since that revision was rolled out, this test doesn't actual fail before this fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127497 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Revert r127459, "Optimize trivial branches in CodeGenPrepare, which often getDaniel Dunbar
created from the", it broke some GCC test suite tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127477 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Optimize trivial branches in CodeGenPrepare, which often get created from theCameron Zwarich
lowering of objectsize intrinsics. Unfortunately, a number of tests were relying on llc not optimizing trivial branches, so I had to add an option to allow them to continue to test what they originally tested. This fixes <rdar://problem/8785296> and <rdar://problem/9112893>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127459 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Change the x86 32-bit scheduler to register pressure and fix up theEric Christopher
corresponding testcases back to the previous versions. Fixes some performance regressions only seen on 32-bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127441 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-11Avoid replacing the value of a directly stored load with the stored value if ↵Evan Cheng
the load is indexed. rdar://9117613. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127440 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-10Properly pseudo-ize MOVCCr and MOVCCs.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127434 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-10PTX: Add preliminary support for floating-point divide and multiply-and-addJustin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127410 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-10ptx: add the rest of special registers of ISA version 2.0Che-Liang Chiou
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127397 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-10Revert 127359; it broke lencod.Stuart Hastings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127382 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09Revert "Re-enable test and hope to silence the buildbots", still broken.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127369 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09Fix mistyped CHECK lines.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127366 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09Tweak test to work on Linux.Stuart Hastings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127364 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09Disable this test temporarily to reduce BuildBot complaints.Stuart Hastings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127363 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09X86 byval copies no longer always_inline. <rdar://problem/8706628>Stuart Hastings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127359 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09Add a testcase for the addc improvements introduced some commits ago. Patch ↵Bruno Cardoso Lopes
by Akira Hatanaka git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127358 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09Re-enable test and hope to silence the buildbotsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127357 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09try to make o32 cc tests less specific to silence some buildbots. The test ↵Bruno Cardoso Lopes
isn't enabled yet, this is will be done in a subsequent commit. Patch by Akira Hatanaka. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127356 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09Make physreg coalescing independent on the number of uses of the virtual ↵Jakob Stoklund Olesen
register. The damage done by physreg coalescing only depends on the number of instructions the extended physreg live range covers. This fixes PR9438. The heuristic is still luck-based, and physreg coalescing really should be disabled completely. We need a register allocator with better hinting support before that is possible. Convert a test to FileCheck and force spilling by inserting an extra call. The previous spilling behavior was dependent on misguided physreg coalescing decisions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127351 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09Delete a test case that is very sensitive to coalescer behavior.Jakob Stoklund Olesen
The test is derived from an old miscompilation of MultiSource/Benchmarks/VersaBench/8b10b which is run regularly, so we are not losing coverage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127350 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09Improve varags handling, with testcases. Patch by Sasa StankovicBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127349 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09This test case should work with list-ilp or list-burr.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127348 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09Target/X86: Tweak va_arg for Win64 not to miss taking va_start when number ↵NAKAMURA Takumi
of fixed args > 4. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127328 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-09Fix testcase.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127298 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08Strip cruft.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127269 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08Add a testcase for r127263.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127266 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08X86: Fix the (saddo/ssub x, 1) -> incl/decl selection to check the right ↵Benjamin Kramer
operand for 1. Found by inspection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127247 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08PTX: Add intrinsic support for ntid, ctaid, and nctaid registersJustin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127246 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08Turn on list-ilp scheduling by default on x86 and x86-64, fix upEric Christopher
testcases accordingly. Some are currently xfailed and will be filed as bugs to be fixed or understood. Performance results: roughly neutral on SPEC some micro benchmarks in the llvm suite are up between 100 and 150%, only a pair of regressions that are due to be investigated john-the-ripper saw: 10% improvement in traditional DES 8% improvement in BSDI DES 59% improvement in FreeBSD MD5 67% improvement in OpenBSD Blowfish 14% improvement in LM DES Small compile time impact. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127208 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-08Fix a compiler crash where a Glue value had multiple uses. Radar 9049552.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127198 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05ptx: add basic intrinsic supportChe-Liang Chiou
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127084 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05test/CodeGen/X86/vec_cast.ll: [PR8311] Add explicit -mtriple=x86_64-linux ↵NAKAMURA Takumi
and -mtriple=x86_64-win32. Thanks to Nadav, it might be fixed in r126424. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127060 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04Improve div/rem node handling on mips. Patch by Akira HatanakaBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127034 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04Add testcase for r127032Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127033 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04When decling to reuse existing expressions that involve casts, ignoreDan Gohman
bitcasts, which are really no-ops here. This fixes slowdowns on MultiSource/Applications/aha and others. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127031 91177308-0d34-0410-b5e6-96231b3b80d8
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