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2011-05-11Fixes a bug in the DAGCombiner. LoadSDNodes have two values (data, chain).Nadav Rotem
If there is a store after the load node, then there is a chain, which means that there is another user. Thus, asking hasOneUser would fail. Instead we ask hasNUsesOfValue on the 'data' value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131183 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-11Add custom lowering of X86 vector SRA/SRL/SHL when the shift amount is a ↵Nadav Rotem
splat vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131179 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-11Revert 131172 as it is causing clang to miscompile itself. I will tryRafael Espindola
to provide a reduced testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131176 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-11Add a late optimization to BranchFolding that hoist common instruction sequencesEvan Cheng
at the start of basic blocks to their common predecessor. It's actually quite common (e.g. about 50 times in JM/lencod) and has shown to be a nice code size benefit. e.g. pushq %rax testl %edi, %edi jne LBB0_2 ## BB#1: xorb %al, %al popq %rdx ret LBB0_2: xorb %al, %al callq _foo popq %rdx ret => pushq %rax xorb %al, %al testl %edi, %edi je LBB0_2 ## BB#1: callq _foo LBB0_2: popq %rdx ret rdar://9145558 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131172 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-10Produce a __debug_frame section on darwin ARM when appropriate.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131151 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-10PTX: add test cases for cvt, fneg, and selpJustin Holewinski
Patch by Dan Bailey git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131128 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-08X86: Add a bunch of peeps for add and sub of SETB.Benjamin Kramer
"b + ((a < b) ? 1 : 0)" compiles into cmpl %esi, %edi adcl $0, %esi instead of cmpl %esi, %edi sbbl %eax, %eax andl $1, %eax addl %esi, %eax This saves a register, a false dependency on %eax (Intel's CPUs still don't ignore it) and it's shorter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131070 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-06Emit a proper error message when register allocators run out of registers.Jakob Stoklund Olesen
This can't be just an assertion, users can always write impossible inline assembly. Such an assembly statement should be included in the error message. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-06PTX: add PTX 2.3 language targetJustin Holewinski
Patch by Wei-Ren Chen git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130980 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-06Re-revert r130877; it's apparently causing a regression on 197.parser,Eli Friedman
possibly related to cbnz formation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130977 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-05Don't produce a __debug_frame.Rafael Espindola
I tested both gdb on a bootstrapped clang and and the gdb testsuite on OS X (snow leopard) and both are happy using __eh_frame. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130937 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-05Avoid extra vreg copies for arguments passed in registers. Specifically, ↵Eli Friedman
this can make MachineCSE more effective in some cases (especially in small functions). PR8361 / part of rdar://problem/8259436 . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130928 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04Prepare remaining tests for -join-physreg going away.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130893 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04Fix a batch of x86 tests to be coalescer independent.Jakob Stoklund Olesen
Most of these tests require a single mov instruction that can come either before or after a 2-addr instruction. -join-physregs changes the behavior, but the results are equivalent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130891 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04Give this test an explicit register allocator, so that it can work even ifDan Gohman
the default register allocator is changed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130883 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04SjLj EH could produce a machine basic block that legitimately has more than oneBill Wendling
landing pad as its successor. SjLj exception handling jumps to the correct landing pad via a switch statement that's generated right before code-gen. Loosen the constraint in the machine instruction verifier to allow for this. Note, this isn't the most rigorous check since we cannot determine where that switch statement came from. But it's marginally better than turning this check off when SjLj exceptions are used. <rdar://problem/9187612> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130881 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04Re-commit r130862 with a minor change to avoid an iterator running off the ↵Eli Friedman
edge in some cases. Original message: Teach MachineCSE how to do simple cross-block CSE involving physregs. This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130877 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04This test fails on ARM. The test shouldn't explicitly specify alignment (and ↵Galina Kistanova
alignment 4 is wrong) and requires hard-float. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130875 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04Back out r130862; it appears to be breaking bootstrap.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130867 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04Teach MachineCSE how to do simple cross-block CSE involving physregs. This ↵Eli Friedman
allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130862 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04Fix more register and coalescing dependencies.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130859 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04Explicitly request physreg coalesing for a bunch of Thumb2 unit tests.Jakob Stoklund Olesen
These tests all follow the same pattern: mov r2, r0 movs r0, #0 $CMP r2, r1 it eq moveq r0, #1 bx lr The first 'mov' can be eliminated by rematerializing 'movs r0, #0' below the test instruction: $CMP r0, r1 mov.w r0, #0 it eq moveq r0, #1 bx lr So far, only physreg coalescing can do that. The register allocators won't yet split live ranges just to eliminate copies. They can learn, but this particular problem is not likely to show up in real code. It only appears because r0 is used for both the function argument and return value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130858 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04FileCheckize and break dependence on coalescing order.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130856 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04Explicitly request -join-physregs for some tests that depend on it.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130855 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04Do not emit location expression size twice.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130854 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04Remove LLVM IR metadata in test case committed in r130847.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130849 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04Prevent instructions using $gp from being placed between a jalr and the ↵Akira Hatanaka
instruction that restores the clobbered $gp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130847 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04Don't depend on the physreg coalescing order.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130818 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04Don't run this test through -regalloc=basic.Jakob Stoklund Olesen
The basic allocator is really bad about hinting, so it doesn't eliminate all copies when physreg joining is disabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130817 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04Fix register-dependent XCore testsJakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130816 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04Fix register-dependent test in MSP430.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130815 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-03Fix a bunch of ARM tests to be register allocation independent.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130800 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-03Replace the "movnt" intrinsics with a native store + nontemporal metadata bit.Bill Wendling
<rdar://problem/8460511> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130791 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-03Make the test less likely to fail with minor changes.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130778 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-03Remove test for iOS divmod function, since that is disabled for now.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130769 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-03Add a few ARM coprocessor intrinsics. Testcases includedBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130763 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-03Add an unfolded offset field to LSR's Formula record. This is used toDan Gohman
model constants which can be added to base registers via add-immediate instructions which don't require an additional register to materialize the immediate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130743 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-02Add 130690 back.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130693 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-02Revert while I debug the tests that use march but not mtriple.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130691 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-02Move ppc OS X to cfi too. I am building it on an old ppc mini, but it will ↵Rafael Espindola
take some time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130690 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-01Add r130623 back now that ELF has been fixed to work with -fno-dwarf2-cfi-asm.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130658 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-01GCC uses a different encoding of pointers in the FDE when usingRafael Espindola
-fno-dwarf2-cfi-asm. Implement the same behavior. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130637 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-30Revert the previous patch while I figure out how to make llvm-gccRafael Espindola
less agressive about disabling cfi on linux :-( git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130626 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-30Enable CFI on OS X.Rafael Espindola
Currently the output should be almost identical to the one produced by CodeGen to make the transition easier. The only two differences I know of are: * Some files get an extra advance loc of size 0. This will be fixed when relaxations are enabled. * The optimization of declaring an EH symbol as an external variable is not implemented. This is a subset of adding the nounwind attribute, so we if really this at -O0 we should probably do it at the IL level. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130623 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-30Allow folded spills in test.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130599 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-30Weekly fix of register allocation dependent unit tests.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130567 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29Make FastEmit_ri_ try a bit harder to succeed for supported operations; ↵Eli Friedman
FastEmit_i can fail for non-Thumb2 ARM. Makes ARMSimplifyAddress work correctly, and reduces the number of fast-isel bailouts on non-Thumb ARM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130560 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29Switch to ImmLeaf (which can be used by FastISel) for a few more common ↵Eli Friedman
ARM/Thumb2 patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130552 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29Fix run-line, again. :(Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130540 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29Re-committing r130454, which does not in fact break anything.Eli Friedman
Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register. rdar://problem/9338332 . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130539 91177308-0d34-0410-b5e6-96231b3b80d8
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