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2011-06-17remove asmparser support for the old getresult instruction, which has been ↵Chris Lattner
subsumed by extractvalue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133247 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17remove parser support for the obsolete "multiple return values" syntax, whichChris Lattner
was replaced with return of a "first class aggregate". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133245 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17Remove support for using "foo" as symbols instead of %"foo". This is ancientChris Lattner
syntax and has been long obsolete. As usual, updating the tests is the nasty part of this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133242 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17manually upgrade a bunch of tests to modern syntax, and remove some thatChris Lattner
are either unreduced or only test old syntax. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133228 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17Update an insertion point iterator after replacing a return instruction with aCameron Zwarich
tail call pseudoinstruction. This fixes <rdar://problem/9624333>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133227 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16Don't use register classes larger than TLI->getRegClassFor(VT).Jakob Stoklund Olesen
In Thumb mode we cannot handle GPR virtual registers, even though some instructions can. When isel is lowering a CopyFromReg, it should limit itself to subclasses of getRegClassFor(VT). <rdar://problem/9624323> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133210 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16There's no need to be so picky about the particular register.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16PTX: Finish new calling convention implementationJustin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133172 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16Add AVX suport for fpextend.Bruno Cardoso Lopes
Original patch by Syoyo Fujita with more comments by me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133153 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16FileCheck-ize test, and make it work on EABI hosts, like ↵Eli Friedman
clang-native-arm-cortex-a9. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133139 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16Force a triple here so this test doesn't fail on EABI hosts (like ↵Eli Friedman
clang-native-arm-cortex-a9). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133134 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16Commit the right set of tests for r133124. Sorry 'bout that!Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133133 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16Reenabling this test with REQUIRES: AssertsAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133132 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16Typos.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133128 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16Revision r128665 added an optimization to make use of NEON multiplierChad Rosier
accumulator forwarding. Specifically (from SVN log entry): Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplier accumulator forwarding: vadd d3, d0, d1 vmul d3, d3, d2 => vmul d3, d0, d2 vmla d3, d1, d2 Make sure it catches cases where operand 1 is add/fadd/sub/fsub, which was intended in the original revision. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133127 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16Add a DAGCombine for (ext (binop (load x), cst)).Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133124 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16Rename the test. Thanks Cameron! Use shorter/generic names.Anna Zaks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133115 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16Function::getNumBlockIDs() should be used instead of Function::size() to set ↵Anna Zaks
the upper limit on the block IDs since basic blocks might get removed (simplified away) after being initially numbered. Plus the test case, in which SelectionDAGBuilder::visitBr() calls llvm::MachineFunction::removeFromMBBNumbering(), which introduces the hole in numbering leading to an assert in llc (prior to the fix). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133113 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15Testcase for previous commit.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133089 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15Add a new function attribute, nonlazybind, which inhibits lazy-loadingJohn McCall
optimizations when emitting calls to the function; instead those calls may use faster relocations which require the function to be immediately resolved upon loading the dynamic object featuring the call. This is useful when it is known that the function will be called frequently and pervasively and therefore there is no merit in delaying binding of the function. Currently only implemented for x86-64, where it turns into a call through the global offset table. Patch by Dan Gohman, who assures me that he's going to add LangRef documentation for this once it's committed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133080 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15Disabling this test until I can figure out the right lit flags.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133068 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15Remove custom allocation orders in SystemZ.Jakob Stoklund Olesen
Note that this actually changes code generation, and someone who understands this target better should check the changes. - R12Q is now allocatable. I think it was omitted from the allocation order by mistake since it isn't reserved. It as apparently used as a GOT pointer sometimes, and it should probably be reserved if that is the case. - The GR64 registers are allocated in a different order now. The register allocator will automatically put the CSRs last. There were other changes to the order that may have been significant. The test fix is because r0 and r1 swapped places in the allocation order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133067 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15Another revsh pattern. rdar://9609059Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133064 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15Added -stress-sched flag in the Asserts build.Andrew Trick
Added a test case for handling physreg aliases during pre-RA-sched. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133063 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15TargetLoweringOpt is a struct used by DAGCombine, not a pass.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133062 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15This test was failing on X86 machines which do not have SSE4. Fixed the test byNadav Rotem
specifying that the target CPU is corei7. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133053 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15PerformBFICombine - (bfi A, (and B, Mask1), Mask2) -> (bfi A, B, Mask2) iffEvan Cheng
the bits being cleared by the AND are not demanded by the BFI. The previous BFI dag combine rule was actually incorrect (or used to be correct until BFI representation changed). rdar://9609030 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133034 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14Add an optimization that looks for a specific pair-wise add pattern and ↵Tanya Lattner
generates a vpaddl instruction instead of scalarizing the add. Includes a test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133027 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14Add triple.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133026 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14When pattern matching during instruction selection make sure shl x,1 is notChad Rosier
converted to add x,x if x is a undef. add undef, undef does not guarantee that the resulting low order bit is zero. Fixes <rdar://problem/9453156> and <rdar://problem/9487392>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133022 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14Check the llc output.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14Test case for x86 MMX inline asm. rdar://problem/8886707Stuart Hastings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133014 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14Add a test for the recent regression.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133009 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14This test is still failing. Delete the rest of it.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133001 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14Revert r132991. This test is failing on theDan Gohman
llvm-gcc-x86_64-linux-selfhost buildbot and others. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133000 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14Add 132986 back, but avoid non-determinism if a bb address gets reused.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14Add a testcase for #9623Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132991 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14revert 132986 to see if the bots go green.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132988 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14This testcase cause a failure on some bots. Remove the failing test untilNadav Rotem
further investigation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132986 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14Add a testcase for checking the integer-promotion of many different vectorNadav Rotem
types (with power of two types such as 8,16,32 .. 512). Fix a bug in the integer promotion of bitcast nodes. Enable integer expanding only if the target of the conversion is an integer (when the type action is scalarize). Add handling to the legalization of vector load/store in cases where the saved vector is integer-promoted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132985 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14Implement Jakob's suggestion on how to detect fall thought without callingRafael Espindola
AnalyzeBranch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132981 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14Since ARM's prefetch implementation predicted the presence of a instructionBruno Cardoso Lopes
cache prefetch and now that the info from "prefetch" to "ARMPreload" is present, only add a testcase for PLI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132978 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14Add one more argument to the prefetch intrinsic to indicate whether it's a dataBruno Cardoso Lopes
or instruction cache access. Update the targets to match it and also teach autoupgrade. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132976 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14Make the threshold used by branch folding softer. Before we would get aRafael Espindola
sharp all or nothing transition when one extra predecessor was added. Now we still test first ones for merging. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132974 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14Heuristic: If the number of operands in the alias are more than the number ofBill Wendling
operands in the aliasee, don't print the alias. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132963 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-13Be less aggressive about hinting in RAFast.Jakob Stoklund Olesen
In particular, don't spill dirty registers only to satisfy a hint. It is not worth it. The attached test case provides an example where the fast allocator would spill a register when other registers are available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132900 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-12Really fix the fall-through logic.Rafael Espindola
Add a triple to the tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132885 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-12Test for the previous commit.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132884 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-12AnalyzeBranch doesn't change which successors a bb has, just the orderRafael Espindola
we try to branch to them. Before we were creating successor lists with duplicated entries. Fixing that found a bug in isBlockOnlyReachableByFallthrough that would causes it to return the wrong answer for ----------- ... jne foo jmp bar foo: ---------- git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132882 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-10Add full x86 fast-isel support for memcpy and memset.Eli Friedman
rdar://9431466 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132864 91177308-0d34-0410-b5e6-96231b3b80d8
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