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2011-07-08Go ahead and emit the barrier on x86-64 even without sse2. TheEric Christopher
processor supports it just fine. Fixes PR9675 and rdar://9740801 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134664 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07Add support for the X86 'l' constraint.Eric Christopher
Fixes PR10149 and rdar://9738585 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134648 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07Add Mode64Bit feature and sink it down to MC layer.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134641 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07Change some ARM subtarget features to be single bit yes/no in order to sink ↵Evan Cheng
them down to MC layer. Also fix tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134590 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07Added a testcase for PR10220.Lang Hames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134573 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Introduce "expect" intrinsic instructions.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134516 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Revert r134366 and add an explicit triple to make this test host-independent.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134447 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Fix PR10277.Jakob Stoklund Olesen
Remat during spilling triggers dead code elimination. If a phi-def becomes unused, that may also cause live ranges to split into separate connected components. This type of splitting is different from normal live range splitting. In particular, there may not be a common original interval. When the split range is its own original, make sure that the new siblings are also their own originals. The range being split cannot be used as an original since it doesn't cover the new siblings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134413 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-03test/CodeGen/X86/lsr-nonaffine.ll: Relax expressions for Win64 CC to appease ↵NAKAMURA Takumi
Win32 hosts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134366 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-ize another test. Reduces the llc invocations from 8 to 1, andChandler Carruth
makes one of the tests actually mean something (as the string 'add' will always appear in the output of this file). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134358 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-ize another X86 test, making it more precisely verify theChandler Carruth
desired result based on the comments in the file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134354 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-ize and simplify RUN lines.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134352 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-izeChandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134351 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-ize and tighten up assertions to only check the relevant sections.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134350 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-ize and cleanup IR.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134349 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-izeChandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134348 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Remove a grep that is already checked with FileCheck.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134346 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-izeChandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134345 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-ize and modernize IR.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134344 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-ize and simplify RUNs.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134343 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-ize and modernize the RUN line.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134342 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-ize, tightening checks and avoiding a temporary file.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134341 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-ize, tightening checks and avoiding a temporary file.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134340 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-izeChandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134339 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-izeChandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134338 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-ize a test, avoiding a temporary file.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134337 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-ize and simplify this test.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134336 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-izeChandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134335 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-ize another codegen test.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134334 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Partially FileCheck-ize a test to remove a weird quoting situation.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134333 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-ize another test, and upgrade its syntax a bit.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134332 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-ize another codegen test, tightening it up.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134331 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-ize another test, making it much more precise for testing theChandler Carruth
individual cases, while hard coding less about registers in use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134330 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-ize another test. This one is more clear and runs fewerChandler Carruth
commands as a result. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134329 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02FileCheck-ize a test, no functionality changed.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134328 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Better diagnostics when inline asm fails to allocate.Jakob Stoklund Olesen
asm.c:2:7: error: ran out of registers during register allocation asm(""::"r"(0), "r"(1), "r"(2), "r"(3), "r"(4), "r"(5), "r"(6), "r"(7), "r"(8), "r"(9)); ^ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134310 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Be less specific about register allocation ordering.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134308 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01TargetConstant immediates won't be placed into registers so tightenEric Christopher
up the valid constant check earlier. rdar://9692967 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134286 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Teach IVUsers to stop at non-affine expressions unless they are bothDan Gohman
outside the loop and reducible. This more completely hides them from LSR, which isn't usually able to do anything meaningful with non-affine expressions anyway, and this consequently hides them from SCEVExpander, which is acutely unprepared for non-affine expressions. Replace test/CodeGen/X86/lsr-nonaffine.ll with a new test that tests the new behavior. This works around the bug in PR10117 / rdar://problem/9633149, and is generally an improvement besides. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134268 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01ARMv7M vs. ARMv7E-M support.Jim Grosbach
The DSP instructions in the Thumb2 instruction set are an optional extension in the Cortex-M* archtitecture. When present, the implementation is considered an "ARMv7E-M implementation," and when not, an "ARMv7-M implementation." Add a subtarget feature hook for the v7e-m instructions and hook it up. The cortex-m3 cpu is an example of a v7m implementation, while the cortex-m4 is a v7e-m implementation. rdar://9572992 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134261 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Add support for the 'j' immediate constraint. This is conditionalized onEric Christopher
supporting the instruction that the constraint is for 'movw'. Part of rdar://9119939 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134222 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Add support for the ARM 't' register constraint. And another testcaseEric Christopher
for the 'x' register constraint. Part of rdar://9119939 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134220 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Add support for the 'x' constraint.Eric Christopher
Part of rdar://9307836 and rdar://9119939 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134215 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30Fix a problem with fast-isel return values introduced in r134018.Jakob Stoklund Olesen
We would put the return value from long double functions in the wrong register. This fixes gcc.c-torture/execute/conversion.c git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134205 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30Add support for the 'h' constraint.Eric Christopher
Part of rdar://9119939 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134203 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30Thumb1 register to register MOV instruction is predicable.Jim Grosbach
Fix a FIXME and allow predication (in Thumb2) for the T1 register to register MOV instructions. This allows some better codegen with if-conversion (as seen in the test updates), plus it lays the groundwork for pseudo-izing the tMOVCC instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134197 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30Pseudo-ize the t2LDMIA_RET instruction.Jim Grosbach
It's just a t2LDMIA_UPD instruction with extra codegen properties, so it doesn't need the encoding information. As a side-benefit, we now correctly recognize for instruction printing as a 'pop' instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134173 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30Fix a small thinko for constant i64 lock/orq optimization where weEric Christopher
we didn't have an opcode for 64-bit constant or expressions. Fixes rdar://9692967 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134121 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29Revert r133953 for now.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134116 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29In the ARM global merging pass, allow extraneous alignment specifiers. This passCameron Zwarich
already makes the assumption, which is correct on ARM, that a type's alignment is less than its alloc size. This improves codegen with Clang (which inserts a lot of extraneous alignment specifiers) and fixes <rdar://problem/9695089>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134106 91177308-0d34-0410-b5e6-96231b3b80d8
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