| Age | Commit message (Expand) | Author |
|---|
| 2009-06-22 | Add support for ARM's Advanced SIMD (NEON) instruction set. | Bob Wilson |
| 2009-06-22 | It's coalescer, not coaleser. | Evan Cheng |
| 2009-06-22 | For Darwin on ARMv6 and newer, make register r9 available for use as a | Bob Wilson |
| 2009-06-22 | Fix another register coalescer crash: forgot to check if the instruction bein... | Evan Cheng |
| 2009-06-22 | hasFP should return true if frame address is taken. | Evan Cheng |
| 2009-06-20 | Fix PR4419: handle defs of partial uses. | Evan Cheng |
| 2009-06-19 | Enable arm pre-allocation load / store multiple optimization pass. | Evan Cheng |
| 2009-06-19 | Mark a few Thumb instructions commutable; just happened to spot this | Eli Friedman |
| 2009-06-17 | Initial support for some Thumb2 instructions. | Anton Korobeynikov |
| 2009-06-16 | Make the test target-neutral | Anton Korobeynikov |
| 2009-06-16 | GNU as refuses to assemble "pop {}" instruction. Do not emit such | Anton Korobeynikov |
| 2009-06-16 | If a val# is defined by an implicit_def and it is being removed, all of the c... | Evan Cheng |
| 2009-06-15 | ifcvt should ignore cfg where true and false successors are the same. | Evan Cheng |
| 2009-06-15 | Part 1. | Evan Cheng |
| 2009-06-13 | Add a ARM specific pre-allocation pass that re-schedule loads / stores from | Evan Cheng |
| 2009-06-12 | If killed register is defined by implicit_def, do not clear it since it's liv... | Evan Cheng |
| 2009-06-12 | Mark some pattern-less instructions as neverHasSideEffects. | Evan Cheng |
| 2009-06-08 | Add testcase for register scanveger assertion fix in r72755 | Anton Korobeynikov |
| 2009-06-05 | Changing allocation ordering from r3 ... r0 back to r0 ... r3. The order chan... | Evan Cheng |
| 2009-06-04 | Split the Add, Sub, and Mul instruction opcodes into separate | Dan Gohman |
| 2009-06-04 | A value defined by an implicit_def can be liven to a use BB. This is unfortun... | Evan Cheng |
| 2009-06-04 | Re-apply 72756 with fixes. One of those was introduced by we changed MachineI... | Evan Cheng |
| 2009-06-03 | Temporarily revert 72756 for now. | Evan Cheng |
| 2009-06-03 | Fold preceding / trailing base inc / dec into the single load / store as well. | Evan Cheng |
| 2009-05-19 | Fix pr4058 and pr4059. Do not split i64 or double arguments between r3 and | Bob Wilson |
| 2009-05-19 | Fix pr4091: Add support for "m" constraint in ARM inline assembly. | Bob Wilson |
| 2009-05-18 | Add nounwind to a few tests. | Dan Gohman |
| 2009-05-12 | Fix pr4195: When iterating through predecessor blocks, break out of the loop | Bob Wilson |
| 2009-05-07 | Fix pr4100. Do not remove no-op copies when they are dead. The register | Bob Wilson |
| 2009-05-06 | Do not use register as base ptr of pre- and post- inc/dec load / store nodes. | Evan Cheng |
| 2009-05-02 | Previously, RecursivelyDeleteDeadInstructions provided an option | Dan Gohman |
| 2009-04-17 | Rename file to have the correct suffix. | Bob Wilson |
| 2009-04-17 | Use CallConvLower.h and TableGen descriptions of the calling conventions | Bob Wilson |
| 2009-04-16 | Expand GEPs in ScalarEvolution expressions. SCEV expressions can now | Dan Gohman |
| 2009-04-14 | Use the output of the asm so the optimizer won't | Dale Johannesen |
| 2009-04-10 | move a target-specific test into its directory so it isn't run if you | Chris Lattner |
| 2009-04-09 | Fix pr3954. The register scavenger asserts for inline assembly with | Bob Wilson |
| 2009-04-08 | Add testcase for PR3795. | Bob Wilson |
| 2009-04-08 | Soft float support for FREM. | Duncan Sands |
| 2009-04-08 | Soft float support for undef. Reported by Xerxes Rånby. | Duncan Sands |
| 2009-04-06 | Handle 'a' modifier in ARM inline assembly. | Bob Wilson |
| 2009-04-01 | Fix PR3862: Recognize some ARM-specific constraints for immediates in inline | Bob Wilson |
| 2009-03-24 | Do not emit comments unless -asm-verbose. | Evan Cheng |
| 2009-03-12 | add no-unwind, remove duplicate run line. | Chris Lattner |
| 2009-03-09 | ARM isLegalAddressImmediate should check if type is a simple type now that op... | Evan Cheng |
| 2009-03-08 | Recognize triplets starting with armv5-, armv6- etc. And set the ARM arch ver... | Evan Cheng |
| 2009-03-08 | If a MI uses the same register more than once, only mark one of them as 'kill'. | Evan Cheng |
| 2009-02-28 | Last commit accidentially deleted this code. | Evan Cheng |
| 2009-02-26 | The last commit was overly conservative. It's ok to reuse value that's alread... | Evan Cheng |
| 2009-02-22 | If a use operand is marked isKill, don't forget to add kill to its live inter... | Evan Cheng |
