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AgeCommit message (Expand)Author
2009-11-05Attempt again to fix buildbot failures: make expected output less specificBob Wilson
2009-11-04Fix broken test.Bob Wilson
2009-11-04Add test for ARM indirectbr codegen.Bob Wilson
2009-11-03fconsts / fconstd immediate should be proceeded with #.Evan Cheng
2009-11-03Re-apply 85799. It turns out my code isn't buggy.Evan Cheng
2009-11-03Fix PR5367. QPR_8 is the super regclass of DPR_8 and SPR_8.Evan Cheng
2009-11-03Revert r85049, it is causing PR5367Anton Korobeynikov
2009-11-02Revert 85799 for now. It might be breaking llvm-gcc driver.Evan Cheng
2009-11-02Initilize the machine LICM CSE map upon the first time an instruction is hois...Evan Cheng
2009-11-02Remove an irrelevant and poorly reduced test case.Evan Cheng
2009-11-02Handle splats of undefs properly. This includes the testcase for PR5364 as well.Anton Korobeynikov
2009-11-0264-bit FP loads & stores operate on both NEON and VFP pipelines.Anton Korobeynikov
2009-10-31vml[as].f32 cause stalls in following advanced SIMD instructions. Avoid usingJim Grosbach
2009-10-31Update test to be more explicit about what instruction sequences are expected...Jim Grosbach
2009-10-31Expand 64-bit logical shift right inlineJim Grosbach
2009-10-31Expand 64-bit arithmetic shift right inlineJim Grosbach
2009-10-31Expand 64 bit left shift inline rather than using the libcall. For now, thisJim Grosbach
2009-10-31Add missing colons for FileCheck.Benjamin Kramer
2009-10-31Convert to FileCheckJim Grosbach
2009-10-30This fixes functions likeRafael Espindola
2009-10-28Use fconsts and fconstd to materialize small fp constants.Evan Cheng
2009-10-27Add missing testcase.Rafael Espindola
2009-10-27Fix the rest of the ARM failures by converting them to FileCheck.Bob Wilson
2009-10-27Fix some more failures by converting to FileCheck.Bob Wilson
2009-10-27Convert to FileCheck, fixing failure due to tab change in the process.Bob Wilson
2009-10-25Update tests.Evan Cheng
2009-10-22Revert 84843. Evan, this was breaking some of the if-conversion tests.Bob Wilson
2009-10-22Move if-conversion before post-regalloc scheduling so the predicated instruct...Evan Cheng
2009-10-22Don't generate sbfx / ubfx with negative lsb field. Patch by David Conrad.Evan Cheng
2009-10-21Match more patterns to movt.Evan Cheng
2009-10-20Fix invalid for vector types fneg(bitconvert(x)) => bitconvert(x ^ sign)Anton Korobeynikov
2009-10-19convert to filecheck syntax and make a lot more aggressive.Chris Lattner
2009-10-19rename testChris Lattner
2009-10-16Enable post-alloc scheduling for all ARM variants except for Thumb1.Evan Cheng
2009-10-13Revise ARM inline assembly memory operands to require the memory address toBob Wilson
2009-10-13Add ARMv6T2 SBFX/UBFX instructions. Approved by Anton Korobeynikov.Sandeep Patel
2009-10-12Eliminate some redundant llvm-as calls.Benjamin Kramer
2009-10-09Update this test; the code is the same but it gets counted as oneDan Gohman
2009-10-09Merge a bunch of NEON tests into larger files so they run faster.Bob Wilson
2009-10-09Convert some ARM tests with lots of greps to use FileCheck.Bob Wilson
2009-10-09Commit one last NEON test to use FileCheck. That's all of them now!Bob Wilson
2009-10-09Convert more NEON tests to use FileCheck.Bob Wilson
2009-10-09Add codegen support for NEON vst4lane intrinsics with 128-bit vectors.Bob Wilson
2009-10-08Add codegen support for NEON vst3lane intrinsics with 128-bit vectors.Bob Wilson
2009-10-08Add codegen support for NEON vst2lane intrinsics with 128-bit vectors.Bob Wilson
2009-10-08Convert more NEON tests to use FileCheck.Bob Wilson
2009-10-08Add codegen support for NEON vld4lane intrinsics with 128-bit vectors.Bob Wilson
2009-10-08Convert more NEON tests to use FileCheck.Bob Wilson
2009-10-08Add codegen support for NEON vld3lane intrinsics with 128-bit vectors.Bob Wilson
2009-10-08Use lower16 / upper16 imm modifiers to asmprint 32-bit imms splitted via movt...Anton Korobeynikov
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