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2012-12-27AVX/AVX2: Move the code that lowers vector-trunc from a DAGCo-hook to custom ↵Nadav Rotem
lowering hook. The vector truncs were scalarized during LegalizeVectorOps, later vectorized again by some DAGCombine optimization and finally, lowered by a dagcombing optimization. Now, they are properly lowered during LegalizeVectorOps. No new testcase because the original testcases still work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171146 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27Add hasSideEffects=0 to some forms of ROUND, RCP, and RSQRT.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171143 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27Refactor DAGCombinerInfo. Change the different booleans that indicate if we ↵Nadav Rotem
are before or after different runs of DAGCo, with the CombineLevel enum. Also, added a new API for checking if we are running before or after the LegalizeVectorOps phase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171142 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27Move single letter 'P' prefix out of multiclass now that tablegen allows ↵Craig Topper
defm to start with #NAME. This makes instruction names more searchable again. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171141 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27Update tablegen parser to allow defm names to start with #NAME.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171140 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27Add hasSideEffects=0 to some shift and rotate instructions. None of which ↵Craig Topper
are currently used by code generation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171137 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27Mark the divide instructions as hasSideEffects=0.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171136 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27For the dwarf5 split debug info code split out the string sectionEric Christopher
per compile unit/skeleton compile unit. Update tests accordingly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171133 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27Add hasSideEffects=0 to CMP*rr_REV.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171130 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27Add mayLoad, mayStore, and hasSideEffects tags to BT/BTS/BTR/BTC ↵Craig Topper
instructions. Shouldn't change any functionality since they don't have patterns to select them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171128 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27Right now all of the relocations are 32-bit dwarf, and the relocationEric Christopher
information doesn't return an addend for Rel relocations. Go ahead and use this information to fix relocation handling inside dwarfdump for 32-bit ELF REL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171126 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26If all of the write objects are identified then we can vectorize the loop ↵Nadav Rotem
even if the read objects are unidentified. PR14719. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171124 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Fix operands and encoding form for ARPL instruction. Register form had and ↵Craig Topper
reversed. Memory form writes memory, but was marked as MRMSrcMem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171123 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Add hasSideEffects=0 to some atomic instructions.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171122 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Mark the AL/AX/EAX forms of the basic arithmetic operations has never having ↵Craig Topper
side effects. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171121 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-2680 columns. No functionality change.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171120 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Remove mid-optimizer warning. This situation should be handled differently,Nick Lewycky
such as by a compiler warning, a check in clang -fsanitizer=undefined, being optimized to unreachable, or a combination of the above. PR14722. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171119 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Mark all the _REV instructions as not having side effects. They aren't ↵Craig Topper
really emitted by the backend, but it reduces the number of instructions in the output files with unmodelled side effects to make auditing easier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171118 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Remove a special conditional setting of neverHasSideEffects if the ↵Craig Topper
instruction didn't have a pattern. This was leftover from when tablegen used to complain if things were already inferred from patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171117 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26LoopVectorizer: Optimize the vectorization of consecutive memory access when ↵Nadav Rotem
the iteration step is -1 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171114 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26[msan] Raise alignment of origin stores/loads when possible.Evgeniy Stepanov
Origin alignment is as high as the alignment of the corresponding application location, but never less than 4. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171110 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26[msan] Expand the file comment with track-origins info.Evgeniy Stepanov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171109 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Merge still more SSE/AVX instruction definitions.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171103 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Merge more SSE/AVX instruction definitions.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171102 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Fix 80 column violation.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171097 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Fix class name in comment.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171096 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Merge SSE/AVX PCMPEQ/PCMPGT instruction definitions.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171095 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Remove 'v' from mnemonic to fix asm matching failures.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171093 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Use an additional multiclass to merge the 128/256-bit SSE/AVX instruction ↵Craig Topper
definitions for a bunch of SSE2 integer arithmetic instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171092 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Reformat the docs.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171091 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Use an additional multiclass to merge the 128/256-bit SSE/AVX instruction ↵Craig Topper
definitions for PAND/POR/PXOR/PANDN git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171087 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Merge an AVX/SSE 256-bit and 128-bit multiclass.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171086 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Mark VANDNPD/VANDNPDS as not commutable.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171085 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Remove alignment from a bunch more VEX encoded operations in the folding tables.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171082 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Remove alignment from folding table for VMOVUPD as an unaligned instruction ↵Craig Topper
it shouldn't require alignment... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171081 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Remove alignment requirements from (V)EXTRACTPS. This instruction does ↵Craig Topper
32-bit stores which aren't required to be aligned on SSE or AVX. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171080 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26BBVectorize: Use VTTI to compute costs for intrinsics vectorizationHal Finkel
For the time being this includes only some dummy test cases. Once the generic implementation of the intrinsics cost function does something other than assuming scalarization in all cases, or some target specializes the interface, some real test cases can be added. Also, for consistency, I changed the type of IID from unsigned to Intrinsic::ID in a few other places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171079 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Remove alignment requirement from VCVTSS2SD in folding tables. Reverting ↵Craig Topper
r171049. This instruction doesn't require alignment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171078 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25LoopVectorize: Enable vectorization of the fmuladd intrinsicHal Finkel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171076 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25BBVectorize: Enable vectorization of the fmuladd intrinsicHal Finkel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171075 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25Expand PPC64 atomic load and storeHal Finkel
Use of store or load with the atomic specifier on 64-bit types would cause instruction-selection failures. As with the 32-bit case, these can use the default expansion in terms of cmp-and-swap. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171072 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25[msan] Fix handling of vectors of pointers.Evgeniy Stepanov
VectorType::getInteger() can not be used with them, because pointer size depends on the target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171070 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25[msan] Fix handling of select with vector condition.Evgeniy Stepanov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171069 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25X86: Shave off one shuffle from the pcmpeqq sequence for SSE2 by making use ↵Benjamin Kramer
of and commutativity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171064 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25X86: Custom lower <2 x i64> eq and ne when SSE41 is not available.Benjamin Kramer
pcmpeqd, pshufd, pshufd, pand is cheaper than unpack + cmpq, sbbq, cmpq, sbbq + pack. Small speedup on loop-vectorized viterbi (-march=core2). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171063 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25ASan: initialize callbacks from ASan module pass in a separate function for ↵Alexey Samsonov
consistency git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171061 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25ASan: move stack poisoning logic into FunctionStackPoisoner structAlexey Samsonov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171060 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25Fix whitespace. No functionality change.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171051 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25VCVTSS2SD requires a strict alignment. Thanks Elena.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171049 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25Rename LLVMContext diagnostic handler types and functions.Bob Wilson
These are now generally used for all diagnostics from the backend, not just for inline assembly, so this drops the "InlineAsm" from the names. No functional change. (I've left aliases for the old names but only for long enough to let me switch over clang to use the new ones.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171047 91177308-0d34-0410-b5e6-96231b3b80d8
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