aboutsummaryrefslogtreecommitdiff
path: root/lib/Target
AgeCommit message (Expand)Author
2012-04-26If triple is armv7 / thumbv7 and a CPU is specified, do not automatically assumeEvan Cheng
2012-04-25Unify internal representation of ARM instructions with a register right-shift...Richard Barton
2012-04-25Add ifdef around getSubtargetFeatureName in tablegen output file so that only...Craig Topper
2012-04-25Use vector_shuffles instead of target specific unpack nodes for AVX ZERO_EXTE...Craig Topper
2012-04-25Do not use $gp as a dedicated global register if the target ABI is not O32. Akira Hatanaka
2012-04-24ARM: improved assembler diagnostics for missing CPU features.Jim Grosbach
2012-04-24ARM: Nuke remnant bogus code.Jim Grosbach
2012-04-24AVX: Add additional vbroadcast replacement sequences for integers.Nadav Rotem
2012-04-24AVX2: The BLENDPW instruction selects between vectors of v16i16 using an i8Nadav Rotem
2012-04-24Refactor Thumb ITState handling in ARM Disassembler to more efficiently use i...Richard Barton
2012-04-24AVX: We lower VECTOR_SHUFFLE and BUILD_VECTOR nodes into vbroadcast instructionsNadav Rotem
2012-04-24Remove dangling spaces. Fix some other formatting.Craig Topper
2012-04-24Simplify code a bit and make it compile better. Remove unused parameters.Craig Topper
2012-04-23Tidy up. 80 columns, whitespace, et. al.Jim Grosbach
2012-04-23Optimize the vector UINT_TO_FP, SINT_TO_FP and FP_TO_SINT operations where th...Nadav Rotem
2012-04-23This patch fixes a problem which arose when using the Post-RA schedulerPreston Gurd
2012-04-23ARM: VSLI two-operand assmebly aliases are tblgen'erated.Jim Grosbach
2012-04-23ARM: tblgen'erate VSRA/VRSRA/VSRI assembly two-operand aliases.Jim Grosbach
2012-04-23ARM: vqdmulh two-operand aliases are tblgen'erated now.Jim Grosbach
2012-04-23Revert r155365, r155366, and r155367. All three of these have regressionChandler Carruth
2012-04-23Hexagon V5 (floating point) support.Sirish Pande
2012-04-23Support for Hexagon architectural feature, new value jump.Sirish Pande
2012-04-23Support for Hexagon VLIW Packetizer.Sirish Pande
2012-04-23Use MVT instead of EVT through all of LowerVECTOR_SHUFFLEtoBlend and not just...Craig Topper
2012-04-23Make getZeroVector and getOnesVector more alike as far as how they detect 128...Craig Topper
2012-04-23Tidy up by removing some 'else' after 'return'Craig Topper
2012-04-23Tidy up spacing in LowerVECTOR_SHUFFLEtoBlend. Remove code that checks if shu...Craig Topper
2012-04-23Add a couple llvm_unreachables.Craig Topper
2012-04-23Remove some tab characers.Craig Topper
2012-04-23Remove some 'else' after 'return'. No functional change.Craig Topper
2012-04-22Make Extract128BitVector and Insert128BitVector take an unsigned instead of a...Craig Topper
2012-04-22Convert getNode(UNDEF) to getUNDEF.Craig Topper
2012-04-22Make calls to getVectorShuffle more consistent. Use shuffle VT for calls to g...Craig Topper
2012-04-22Tidy up. 80 columns and argument alignment.Craig Topper
2012-04-22Simplify code by converting multiple places that were manually concatenating ...Craig Topper
2012-04-22ARM: Initialize the HasRAS bit.Benjamin Kramer
2012-04-22ZERO_EXTEND/SIGN_EXTEND/TRUNCATE optimization for AVX2Elena Demikhovsky
2012-04-22Remove some potential warnings about variables used uninitialized.Bill Wendling
2012-04-21Make some fixed arrays const. Use array_lengthof in a couple places instead o...Craig Topper
2012-04-21Tidy up. 80 columns and some other spacing issues.Craig Topper
2012-04-21llvm/lib/Target: [PR12611] Add "llvm/Support/raw_ostream.h" for Debug build o...NAKAMURA Takumi
2012-04-21HexagonISelLowering.cpp: Reorder #includes.NAKAMURA Takumi
2012-04-21HexagonInstPrinter.cpp: Suppress -Wunused-variable warnings with -Asserts.NAKAMURA Takumi
2012-04-20ARM: tblgen'erate more NEON two-operand aliases.Jim Grosbach
2012-04-20ARM: tblgen'erate more NEON two-operand aliases.Jim Grosbach
2012-04-20ARM: Update NEON assembly two-operand aliases.Jim Grosbach
2012-04-20effectively back out my last change (r155190)Gabor Greif
2012-04-20fix obviously bogus (IMO) operand index of the load in assertsGabor Greif
2012-04-20Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change s...Craig Topper
2012-04-20Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change s...Craig Topper
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2026-11-15 06:07:04 +0000