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LLVM with the emscripten fastcomp javascript backend
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2012-06-23
Extend the IL for selecting TLS models (PR9788)
Hans Wennborg
2012-06-23
Use correct memory types for (V)CVTDQ2PD instructions.
Craig Topper
2012-06-23
Silence an unused variable warning on release builds.
Craig Topper
2012-06-23
Compress flags in X86 op folding to reduce space in static tables.
Craig Topper
2012-06-23
Make helper method static since it doesn't use anything in the class.
Craig Topper
2012-06-23
Remove intrinsic specific instructions for 128-bit (V)CVTDQ2PD. Replace with ...
Craig Topper
2012-06-23
Handle aliases to tls variables in all architectures, not just x86.
Rafael Espindola
2012-06-23
(sub X, imm) gets canonicalized to (add X, -imm)
Evan Cheng
2012-06-22
ARM: Add a better diagnostic for some out of range immediates.
Jim Grosbach
2012-06-22
Add support for the PPC isel instruction.
Hal Finkel
2012-06-22
Whitespace.
Chad Rosier
2012-06-22
Revert r158679 - use case is unclear (and it increases the memory footprint).
Hal Finkel
2012-06-22
Use "NoItineraries" for processors with no itineraries.
Andrew Trick
2012-06-22
Functions calling __builtin_eh_return must have a frame pointer.
Jakob Stoklund Olesen
2012-06-22
ARM scheduling fix: don't guess at implicit operand latency.
Andrew Trick
2012-06-22
ARM scheduling fix: compute predicated implicit use properly.
Andrew Trick
2012-06-22
Rename -allow-excess-fp-precision flag to -fuse-fp-ops, and switch from a
Lang Hames
2012-06-22
Convert the PPC backend to use the new FMA infrastructure.
Hal Finkel
2012-06-21
1. fix null program output after some other changes
Akira Hatanaka
2012-06-21
Treat TargetGlobalAddress as a constant for the purpose of matching pre-inc s...
Hal Finkel
2012-06-21
The inline asm operand modifier 'c' is suppose
Jack Carter
2012-06-21
Add a missing llvm.fma -> VFNMS pattern to the ARM backend.
Lang Hames
2012-06-20
Revert r158846.
Akira Hatanaka
2012-06-20
In MipsDisassembler.cpp, instead of defining register class tables, use the ones
Akira Hatanaka
2012-06-20
Add support for generating reg+reg (indexed) pre-inc loads on PPC.
Hal Finkel
2012-06-20
Remove 'static' from inline functions defined in header files.
Chandler Carruth
2012-06-20
Add predicate check around some patterns.
Craig Topper
2012-06-20
Add predicate check around some patterns.
Craig Topper
2012-06-20
Don't insert 128-bit UNDEF into 256-bit vectors. Just keep the 256-bit vector...
Craig Topper
2012-06-19
Add DAG-combines for aggressive FMA formation.
Lang Hames
2012-06-19
Implement PPCInstrInfo::isCoalescableExtInstr().
Jakob Stoklund Olesen
2012-06-19
Have ARM ELF use correct reloc for "b" instr.
Jan Wen Voung
2012-06-19
Mark most PPC register classes to avoid write-after-write.
Hal Finkel
2012-06-19
Make MipsLongBranch::runOnMachineFunction return true.
Akira Hatanaka
2012-06-19
Use MachineBasicBlock::instr_iterator instead of MachineBasicBlock::iterator in
Akira Hatanaka
2012-06-19
Add support for generating reg+reg preinc stores on PPC.
Hal Finkel
2012-06-19
Move the support for using .init_array from ARM to the generic
Rafael Espindola
2012-06-18
ARM: use NOEN loads and stores if possible when handling struct byval.
Manman Ren
2012-06-18
Allow up to 64 functional units per processor itinerary.
Hal Finkel
2012-06-18
ARM: Define generic HINT instruction.
Jim Grosbach
2012-06-18
This change handles a another case for generating the bic instruction
Joel Jones
2012-06-18
Temporarily revert r158087.
Chandler Carruth
2012-06-16
Cleanup trip-count finding for PPC CTR loops (and some bug fixes).
Hal Finkel
2012-06-16
*no need to pollute Intel syntax with bonus mnemonics; operand size is explic...
Kay Tiong Khoo
2012-06-16
Mips/AsmParser/CMakeLists.txt: Fix dependency.
NAKAMURA Takumi
2012-06-15
Fix the encoding of the armv7m (MClass) for MSR registers other than aspr,
Kevin Enderby
2012-06-15
ARM: optimization for sub+abs.
Manman Ren
2012-06-15
*fixed to separate mnemonic from operands with tab
Kay Tiong Khoo
2012-06-15
Preserve <undef> flags in ARMExpandPseudo.
Jakob Stoklund Olesen
2012-06-15
Move AVX version of convert instructions that write to GPRs to the Op1 table.
Craig Topper
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