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AgeCommit message (Expand)Author
2013-02-25Make pseudos FEXT_CCRX16_ins and FEXT_CCRXI16_ins into custom emitters.Reed Kotler
2013-02-24 Make psuedo FEXT_T8I816_ins into a custom emitter.Reed Kotler
2013-02-24Fix PR14364.Bill Schmidt
2013-02-24TypoFrancois Pichet
2013-02-24Revert r169638 because it broke Mesa llvmpipe tests.Nadav Rotem
2013-02-24Make psuedo FEXT_T8I816_ins a custom inserter. It should be expandedReed Kotler
2013-02-23Add new base instruction def for cmpi, cmp, slt and sltu so that def/usesReed Kotler
2013-02-23X86: Disable cmov-memory patterns on subtargets without cmov.Benjamin Kramer
2013-02-23Expand pseudos/macros for Selt. This is the last of the complexReed Kotler
2013-02-23ARM: Convenience aliases for 'srs*' instructions.Jim Grosbach
2013-02-22[mips] Emit call16 operator instead of got_disp. The former allows lazy binding.Akira Hatanaka
2013-02-22x86_64: designate most general purpose and SSE registers as callee save under...Peter Collingbourne
2013-02-22R600/SI: Add pattern for sign extension of i1 to i32.Michel Danzer
2013-02-22R600/SI: Add pattern for logical or of i1 values.Michel Danzer
2013-02-22R600/SI: Add pattern for fceil.Michel Danzer
2013-02-22Make ARMAsmPrinter generate the correct alignment specifier syntax in instruc...Kristof Beyls
2013-02-22Fix a nomenclature mistake. Slt->Slti in the functions. The "i" refersReed Kotler
2013-02-22Expand mips16 SelT form pseudso/macros.Reed Kotler
2013-02-22Remove code copied from GenRegisterInfo.inc.Andrew Trick
2013-02-21Move the eliminateCallFramePseudoInstr method from TargetRegisterInfoEli Bendersky
2013-02-21Hexagon: Expand cttz, ctlz, and ctpop for now.Anshuman Dasgupta
2013-02-21Radar numbers don't belong in source code.Evan Cheng
2013-02-21Trivial cleanupBill Schmidt
2013-02-21Large code model support for PowerPC.Bill Schmidt
2013-02-21getX86SubSuperRegister has a special mode with High=true for i64 whichEli Bendersky
2013-02-21R600/SI: inline V_ADD|SUB_F32 patternsChristian Konig
2013-02-21R600/SI: replace IMPLICIT_DEF with SIOperand.ZEROChristian Konig
2013-02-21R600/SI: replace SI_V_CNDLT with a patternChristian Konig
2013-02-21R600/SI: use patterns for clamp, fabs, fnegChristian Konig
2013-02-21R600/SI: add all the other missing asm operands v2Christian Konig
2013-02-21R600/SI: add the missing M*BUF|IMG asm operandsChristian Konig
2013-02-21R600/SI: add the missing S_* asm operandsChristian Konig
2013-02-21R600/SI: rework VOP3 classesChristian Konig
2013-02-21R600/SI: simplify VOPC_* pattern v2Christian Konig
2013-02-21R600/SI: rework VOP2_* pattern v2Christian Konig
2013-02-21R600/SI: rework VOP1_* patterns v2Christian Konig
2013-02-21R600/SI: add constant for inline zero operandChristian Konig
2013-02-21R600/SI: cleanup SIInstrInfo.td and SIInstrFormat.tdChristian Konig
2013-02-21R600: Fix for Unigine when MachineSched is enabledTom Stellard
2013-02-21Code review cleanup for r175697Bill Schmidt
2013-02-21R600/SI: Make sure M0 is loaded for V_INTERP_MOV_F32Michel Danzer
2013-02-21Expand the sel pseudo/macro. This generates basic blocks where previouslyReed Kotler
2013-02-21Mips specific standalone assembler addressing mode %hi and %lo.Jack Carter
2013-02-21PPCDAGToDAGISel::PostprocessISelDAG()Bill Schmidt
2013-02-21Relocation enablement for PPC DAG postprocessing passBill Schmidt
2013-02-20ELF symbol table field st_other support, Jack Carter
2013-02-20MCParser: Update method names per coding guidelines.Jim Grosbach
2013-02-20R600: Update for name changes from r175667.Jim Grosbach
2013-02-20Update TargetLowering ivars for name policy.Jim Grosbach
2013-02-20Additional fixes for bug 15155.Bill Schmidt
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