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AgeCommit message (Expand)Author
2013-03-08Hexagon: Add patterns for zero extended loads from i1->i64.Jyotsna Verma
2013-03-08AArch64: expand sincos operations, we don't support them.Tim Northover
2013-03-08R600/SI: Use source schedulerMichel Danzer
2013-03-07ArrayRefize some code. No functionality change.Benjamin Kramer
2013-03-07Hexagon: Handle i8, i16 and i1 Var Args.Jyotsna Verma
2013-03-07Hexagon: Add support to lower block address.Jyotsna Verma
2013-03-07X86: Fold EXTRACT_SUBVECTORs of a BUILD_VECTOR into a smaller BUILD_VECTOR.Benjamin Kramer
2013-03-07R600/SI: rework input interpolation v2Christian Konig
2013-03-07R600/SI: remove SI_vs_load_buffer_indexChristian Konig
2013-03-07R600/SI: remove SGPR address space v2Christian Konig
2013-03-07R600/SI: add proper formal parameter handling for SIChristian Konig
2013-03-07R600/SI: remove shader type intrinsicChristian Konig
2013-03-07R600/SI: switch types of SGPRs to v*i8Christian Konig
2013-03-07R600/SI: fix unused variable warningChristian Konig
2013-03-07Fix two remaining issue after fixing PR15355 when CMOV is not availableMichael Liao
2013-03-06[mips] Custom-legalize BR_JT.Akira Hatanaka
2013-03-06Fix PR15355Michael Liao
2013-03-05[mips] Remove android calling convention.Akira Hatanaka
2013-03-05[mips] Fix MipsCC::analyzeReturn so that, in soft-float mode, fp128 getsAkira Hatanaka
2013-03-05[mips] Fix MipsTargetLowering::LowerCallResult and LowerReturn to correctlyAkira Hatanaka
2013-03-05[mips] Fix MipsTargetLowering::LowerCall to pass fp128 arguments in floatingAkira Hatanaka
2013-03-05[mips] Correct handling of fp128 (long double) formals and read long doubleAkira Hatanaka
2013-03-05Add more functions to the TLI.Meador Inge
2013-03-05reverting patch 176508.Jyotsna Verma
2013-03-05Hexagon: Add support for lowering block address.Jyotsna Verma
2013-03-05R600: Do not predicate vector opVincent Lejeune
2013-03-05Hexagon: Expand addc, adde, subc and sube.Jyotsna Verma
2013-03-05Update cmake build.Benjamin Kramer
2013-03-05Hexagon: Use MO operand flags to mark constant extended instructions.Jyotsna Verma
2013-03-05Hexagon: Add encoding bits to the TFR64 instructions.Jyotsna Verma
2013-03-05R600: initial scheduler codeVincent Lejeune
2013-03-05R600: Remove LowerConstCopyPass and lower CONST_COPY right after ISel.Vincent Lejeune
2013-03-05R600: Turn BUILD_VECTOR into Reg_SequenceVincent Lejeune
2013-03-05R600: CONST_ADDRESS node is not marked as mayLoad anymoreVincent Lejeune
2013-03-05R600: Use MUL_IEEE for trig/fdiv intrinsicVincent Lejeune
2013-03-05R600: Add support for indirect addressing of non default const bufferVincent Lejeune
2013-03-05The current X86 NOP padding uses one long NOP followed by the remainder inDavid Sehr
2013-03-04[mips] Print move instructions.Akira Hatanaka
2013-03-04Mips specific inline assembler constraint 'R'Jack Carter
2013-03-04Bypass Slow DividesPreston Gurd
2013-03-04R600: Clean up datalayout strings so they better match hardware capabilitiesTom Stellard
2013-03-04Mips ISD typoJia Liu
2013-03-02ARM: Creating a vector from a lane of another.Jim Grosbach
2013-03-02Clean up code format a bit.Jim Grosbach
2013-03-02Tidy up. Trailing whitespace.Jim Grosbach
2013-03-02ARM NEON: Fix v2f32 float intrinsicsArnold Schwaighofer
2013-03-02X86 cost model: Adjust cost for custom lowered vector multipliesArnold Schwaighofer
2013-03-02Added FIXME for future Hexagon cleanup.Andrew Trick
2013-03-01Only fold small constants into memory reference displacements.Derek Schuff
2013-03-01[mips] Fix inefficient code generation.Akira Hatanaka
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