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AgeCommit message (Expand)Author
2013-04-19ARM: permit "sp" in ARM variants of MOVW/MOVT instructionsTim Northover
2013-04-19Use 'array_lengthof' as possible to avoid magic numbersMichael Liao
2013-04-19R600: Add pattern for the BFI_INT instructionTom Stellard
2013-04-19R600/SI: Use InstFlag for VOP3 modifier operandsTom Stellard
2013-04-19Use an enum instead of magic constants to improve readability.Bill Wendling
2013-04-18[ms-inline asm] Apply the condition code mnemonic aliases to both the Intel andChad Rosier
2013-04-18Set the compact unwind encoding to 'requires EH DWARF' if we cannot generate ...Bill Wendling
2013-04-18Disable PPC comparison optimization by defaultHal Finkel
2013-04-18[asm parser] Add support for predicating MnemonicAlias based on the assemblerChad Rosier
2013-04-18Implement optimizeCompareInstr for PPCHal Finkel
2013-04-18X86: Add an SSE2 lowering for 64 bit compares when pcmpgtq (SSE4.2) isn't ava...Benjamin Kramer
2013-04-18Allow misaligned stores in x86 fast-isel.Derek Schuff
2013-04-18[ms-inline asm] Simplify some logic and add a FIXME for unhandled unary minus.Chad Rosier
2013-04-18Make this private method.Chad Rosier
2013-04-18Fix for PR14824, An ARM Load/Store Optimization bugHao Liu
2013-04-18[mips] Rename function.Akira Hatanaka
2013-04-18[mips] DSP-ASE move from HI/LO register instructions.Akira Hatanaka
2013-04-18Mips assembler: formatting and comment changes.Jack Carter
2013-04-17Add support for subsections to the ELF assembler. Fixes PR8717.Peter Collingbourne
2013-04-17[ms-inline asm] These should be int64_t, not uint64_t.Chad Rosier
2013-04-17[ms-inline asm] Add support for the minus unary operator. Previously, we wereChad Rosier
2013-04-17This patch teaches x86 fast-isel to generate the native div/idiv instructionsEli Bendersky
2013-04-17X86 cost model: Exit before calling getSimpleVT on non-simple VTsArnold Schwaighofer
2013-04-17Fix treatment of ARM unallocated hint instructions.Quentin Colombet
2013-04-17PowerPC: Mark some more patterns as isCodeGenOnly.Ulrich Weigand
2013-04-17R600: Make Export Instruction not duplicableVincent Lejeune
2013-04-17R600: Export is emitted as a CF_NATIVE instVincent Lejeune
2013-04-17R600: Emit used GPRs countVincent Lejeune
2013-04-17Fix -Werror build.Evgeniy Stepanov
2013-04-17Mips assembler: Enable handling of nested expressionsJack Carter
2013-04-17[ms-inline asm] Add support for parsing complex immediate expressions. TestChad Rosier
2013-04-16C API: Add LLVMTargetMachineEmitToMemoryBuffer()Tom Stellard
2013-04-16Remove unused variable from previous refactor.Chad Rosier
2013-04-16[ms-inline asm] Refactor. No functional change intended.Chad Rosier
2013-04-16[ms-inline asm] Remove some dead code.Chad Rosier
2013-04-16Fix build failure introduced in 179591 when assertions are disabled.Logan Chien
2013-04-16Implement ARM unwind opcode assembler.Logan Chien
2013-04-16Add 64-bit multiply and divide instructions for SPARC v9.Jakob Stoklund Olesen
2013-04-15ARM: Add VACLT and VACLE assembly aliases.Jim Grosbach
2013-04-15Mips assembler: Explicit floating point condition register recognition.Jack Carter
2013-04-15R600/SI: Emit config values in register value pairs.Tom Stellard
2013-04-15R600/SI: Emit configuration value in the .AMDGPU.config ELF sectionTom Stellard
2013-04-15R600: Emit ELF formatted code rather than raw ISA.Tom Stellard
2013-04-15Mark all PPC comparison instructions as not having side effectsHal Finkel
2013-04-15Fix PPC64 CR spill location for callee-saved registersHal Finkel
2013-04-14Use i32 for all SPARC shift amounts, even in 64-bit mode.Jakob Stoklund Olesen
2013-04-14Add support for the abs64 SPARC v9 code model.Jakob Stoklund Olesen
2013-04-14Add support for the SPARC v9 abs44 code model.Jakob Stoklund Olesen
2013-04-14Use target flags for printing SPARC asm operands.Jakob Stoklund Olesen
2013-04-14Also put target flags on SPARC constant pool references.Jakob Stoklund Olesen
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