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2013-04-19Use 'array_lengthof' as possible to avoid magic numbersMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179833 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19Use an enum instead of magic constants to improve readability.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179820 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18[ms-inline asm] Apply the condition code mnemonic aliases to both the Intel andChad Rosier
AT&T dialect. Test case for r179804 as well. rdar://13674398 and PR13340. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179813 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18Set the compact unwind encoding to 'requires EH DWARF' if we cannot generate ↵Bill Wendling
a CU encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179808 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18[asm parser] Add support for predicating MnemonicAlias based on the assemblerChad Rosier
variant/dialect. Addresses a FIXME in the emitMnemonicAliases function. Use and test case to come shortly. rdar://13688439 and part of PR13340. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179804 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18X86: Add an SSE2 lowering for 64 bit compares when pcmpgtq (SSE4.2) isn't ↵Benjamin Kramer
available. This pattern started popping up in vectorized min/max reductions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179797 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18Allow misaligned stores in x86 fast-isel.Derek Schuff
In X86FastISel::X86SelectStore(), improperly aligned stores are rejected and handled by the DAG-based ISel. However, X86FastISel::X86SelectLoad() makes no such requirement. There doesn't appear to be an x86 architectural correctness issue with allowing potentially unaligned store instructions. This patch removes this restriction. Patch by Jim Stichnot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179774 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18[ms-inline asm] Simplify some logic and add a FIXME for unhandled unary minus.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179765 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18Make this private method.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179764 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17[ms-inline asm] These should be int64_t, not uint64_t.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179724 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17[ms-inline asm] Add support for the minus unary operator. Previously, we wereChad Rosier
unable to handle cases such as __asm mov eax, 8*-8. This patch also attempts to simplify the state machine. Further, the error reporting has been improved. Test cases included, but more will be added to the clang side shortly. rdar://13668445 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179719 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17This patch teaches x86 fast-isel to generate the native div/idiv instructionsEli Bendersky
for the sdiv/srem/udiv/urem bitcode instructions. This is done for the i8, i16, and i32 types, as well as i64 for the x86_64 target. Patch by Jim Stichnoth git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179715 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17X86 cost model: Exit before calling getSimpleVT on non-simple VTsArnold Schwaighofer
getSimpleVT can only handle simple value types. radar://13676022 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179714 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16Add support for the div/rem instructions under x86 fast-isel.Jim Stichnoth
BUG= https://code.google.com/p/nativeclient/issues/detail?id=3385 Review URL: https://codereview.chromium.org/14261012
2013-04-17[ms-inline asm] Add support for parsing complex immediate expressions. TestChad Rosier
cases to be submitted on clang side shortly. rdar://13663768 and PR15760 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179655 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16Remove unused variable from previous refactor.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179611 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16[ms-inline asm] Refactor. No functional change intended.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179610 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-16[ms-inline asm] Remove some dead code.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179607 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13X86 machine model: reduce SandyBridge and Haswell ILPWindow.Andrew Trick
The initial values were arbitrary. I want them to be more conservative. This represents the number of latency cycles hidden by OOO execution. In practice, I think it should be within a small factor of the complex floating point operation latency so the scheduler can make some attempt to hide latency even for smallish blocks. These are by no means the best values, just a starting point for tuning heuristics. Some benchmarks such as TSVC run faster with this lower value for SandyBridge. I haven't run anything on Haswell, but it's shouldn't be 2x SB. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179450 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13Catch another case where SD fails to propagate node order.Andrew Trick
I need to handle this for the test case in my following scheduler commit. Work is already under way to redesign the mechanism for node order propagation because this case by case approach is unmaintainable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179448 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12[ms-inline asm] Simplify the logic by using parsePrimaryExpr. No functionalChad Rosier
change intended. Test case previously added in r178568. Part of rdar://13611297 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179425 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12[ms-inline asm] Move this logic into a static function as it's only applicableChad Rosier
when parsing MS-style inline assembly. No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179407 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12[ms-inline asm] Address the FIXME for ImmDisp before brackets. ThisChad Rosier
is a follow on to r179393 and r179399. Test case to be added on the clang side. Part of rdar://13453209 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179403 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12[ms-inline asm] Have the [ Symbol ] case fall into the more general logic. ThisChad Rosier
is a follow on to r179393. Test case to be added on the clang side. Part of rdar://13453209 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179399 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12[ms-inline asm] Add support for operands that include both a symbol and anChad Rosier
immediate displacement. Specifically, add support for generating the proper IR. We've been able to parse this for some time now. Test case to be added on the clang side. Part of rdar://13453209 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179393 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11[ms-inline asm] Add support for using the LENGTH, TYPE, and SIZE operators withChad Rosier
variables that use namespace alias qualifiers. Test case coming on clang side shortly. Part of rdar://13499009 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179343 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11[ms-inline asm] Add support for using offsetof operator with variables that useChad Rosier
namespace alias qualifiers. Test case coming on clang side shortly. Part of rdar://13499009 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179339 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11[ms-inline asm] Pass a StringRef reference to ParseIntelVarWithQualifier so weChad Rosier
can build up the identifier string. No test case as support for looking up these type of identifiers hasn't been implemented on the clang side. Part of rdar://13499009 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179336 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11[ms-inline asm] Remove brackets from around a symbol reference in the targetChad Rosier
specific logic. This makes the code much less fragile. Test case coming on the clang side in a moment. rdar://13634327 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179323 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11Optimize vector select from all 0s or all 1sMichael Liao
As packed comparisons in AVX/SSE produce all 0s or all 1s in each SIMD lane, vector select could be simplified to AND/OR or removed if one or both values being selected is all 0s or all 1s. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179267 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11Add CLAC/STAC instruction encoding/decoding supportMichael Liao
As these two instructions in AVX extension are privileged instructions for special purpose, it's only expected to be used in inlined assembly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179266 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11Enhance bool simplifcation in X86 to handle more casesMichael Liao
This patch is revised based on patch from Victor Umansky <victor.umansky@intel.com>. More cases are handled in X86's bool simplification, i.e. - SETCC_CARRY - value is truncated to i1 with AND As a by-product, PR5443 is also fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179265 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-10MC: Support COFF image-relative MCSymbolRefsNico Rieck
Add support for the COFF relocation types IMAGE_REL_I386_DIR32NB and IMAGE_REL_AMD64_ADDR32NB for 32- and 64-bit respectively. These are similar to normal 4-byte relocations except that they do not include the base address of the image. Image-relative relocations are used for debug information (32-bit) and SEH unwind tables (64-bit). A new MCSymbolRef variant called 'VK_COFF_IMGREL32' is introduced to specify such relocations. For AT&T assembly, this variant can be accessed using the symbol suffix '@imgrel'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179240 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-10fixed xsave, xsaveopt, xrstor mnemonics with intel syntax; added test casesKay Tiong Khoo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179223 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-10fixed to disassemble with tab after mnemonic rather than spaceKay Tiong Khoo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179215 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-10In the X86 back end, getMemoryOperandNo() returns the offsetPreston Gurd
into the operand array of the start of the memory reference descriptor. Additional code in EncodeInstruction provides an additional adjustment. This patch places that additional code in a separate function, called getOperandBias, so that any caller of getMemoryOperandNo can also call getOperandBias. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179211 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-10Tidy up, fix and simplify a few of the SMLocs. Prior to r179109 the Start SMLocChad Rosier
wasn't always the start of the operand. If there was a symbol reference, then Start pointed to that token. It's very likely there are other places that need to be updated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179210 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-10Remove unused variable.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179205 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-10Reapply r179115, but use parsePrimaryExpression a little more judiciously.Chad Rosier
Test cases that regressed due to r179115, plus a few more, were added in r179182. Original commit message below: [ms-inline asm] Use parsePrimaryExpr in lieu of parseExpression if we need to parse an identifier. Otherwise, parseExpression may parse multiple tokens, which makes it impossible to properly compute an immediate displacement. An example of such a case is the source operand (i.e., [Symbol + ImmDisp]) in the below example: __asm mov eax, [Symbol + ImmDisp] Part of rdar://13611297 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179187 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-10__sincosf_stret returns sinf / cosf in bits 0:31 and 32:63 of xmm0, not inEvan Cheng
xmm0 / xmm1. rdar://13599493 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179141 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-09Cleanup. No functional change intended.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179129 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-09Cleanup. No functional change intended.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179125 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-09Revert r179115 as it looks to have killed the ASan tests.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179120 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-09[ms-inline asm] Use parsePrimaryExpr in lieu of parseExpression if we need toChad Rosier
parse an identifier. Otherwise, parseExpression may parse multiple tokens, which makes it impossible to properly compute an immediate displacement. An example of such a case is the source operand (i.e., [Symbol + ImmDisp]) in the below example: __asm mov eax, [Symbol + ImmDisp] The existing test cases exercise this patch. rdar://13611297 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179115 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-09[ms-inline asm] Maintain a StringRef to reference a symbol in a parsed operand,Chad Rosier
rather than deriving the StringRef from the Start and End SMLocs. Using the Start and End SMLocs works fine for operands such as [Symbol], but not for operands such as [Symbol + ImmDisp]. All existing test cases that reference a variable exercise this patch. rdar://13602265 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179109 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-08X86 cost model: Model cost for uitofp and sitofp on SSE2Arnold Schwaighofer
The costs are overfitted so that I can still use the legalization factor. For example the following kernel has about half the throughput vectorized than unvectorized when compiled with SSE2. Before this patch we would vectorize it. unsigned short A[1024]; double B[1024]; void f() { int i; for (i = 0; i < 1024; ++i) { B[i] = (double) A[i]; } } radar://13599001 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179033 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-08[ms-inline asm] Add support for ImmDisp [ Symbol ] memory operands.Chad Rosier
rdar://13521249 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179030 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-05Use the target options specified on a function to reset the back-end.Bill Wendling
During LTO, the target options on functions within the same Module may change. This would necessitate resetting some of the back-end. Do this for X86, because it's a Friday afternoon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178917 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-05[ms-inline asm] Add support for numeric displacement expressions in bracketedChad Rosier
memory operands. Essentially, this layers an infix calculator on top of the parsing state machine. The scale on the index register is still expected to be an immediate __asm mov eax, [eax + ebx*4] and will not work with more complex expressions. For example, __asm mov eax, [eax + ebx*(2*2)] The plus and minus binary operators assume the numeric value of a register is zero so as to not change the displacement. Register operands should never be an operand for a multiply or divide operation; the scale*indexreg expression is always replaced with a zero on the operand stack to prevent such a case. rdar://13521380 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178881 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-04X86 cost model: Differentiate cost for vector shifts of constantsArnold Schwaighofer
SSE2 has efficient support for shifts by a scalar. My previous change of making shifts expensive did not take this into account marking all shifts as expensive. This would prevent vectorization from happening where it is actually beneficial. With this change we differentiate between shifts of constants and other shifts. radar://13576547 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178808 91177308-0d34-0410-b5e6-96231b3b80d8
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