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In order to cost subvector insertion and extraction, we need to know
the type of the subvector being extracted.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171453 91177308-0d34-0410-b5e6-96231b3b80d8
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Patch by Michael M Kuperstein!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171414 91177308-0d34-0410-b5e6-96231b3b80d8
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into their new header subdirectory: include/llvm/IR. This matches the
directory structure of lib, and begins to correct a long standing point
of file layout clutter in LLVM.
There are still more header files to move here, but I wanted to handle
them in separate commits to make tracking what files make sense at each
layer easier.
The only really questionable files here are the target intrinsic
tablegen files. But that's a battle I'd rather not fight today.
I've updated both CMake and Makefile build systems (I think, and my
tests think, but I may have missed something).
I've also re-sorted the includes throughout the project. I'll be
committing updates to Clang, DragonEgg, and Polly momentarily.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
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and RCP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171356 91177308-0d34-0410-b5e6-96231b3b80d8
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and RCP.
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and RSQRTPS.
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funcitonal change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171337 91177308-0d34-0410-b5e6-96231b3b80d8
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RSQRTPS. VEX-encoded forms already use packed.
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AttributeSet accessor method.
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directly.
This is in preparation for removing the use of the 'Attribute' class as a
collection of attributes. That will shift to the AttributeSet class instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171253 91177308-0d34-0410-b5e6-96231b3b80d8
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target-independent ISD nodes and use the existing patterns for those.
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max/min instructions. Lower them to target specific nodes and use those patterns instead. This also allows them to be commuted if UnsafeFPMath is enabled.
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optimizations. The old test cases still cover all of these lowering/optimizations. The single change that we have is that now anyext does not need to zero a register, because it does not use the exact code path as the zero_extend.
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lowering function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171170 91177308-0d34-0410-b5e6-96231b3b80d8
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register. In most cases we actually compare or select YMM-sized registers
and mixing the two types creates horrible code. This commit optimizes
some of the transition sequences.
PR14657.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171148 91177308-0d34-0410-b5e6-96231b3b80d8
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lowering hook.
The vector truncs were scalarized during LegalizeVectorOps, later vectorized again by some DAGCombine optimization
and finally, lowered by a dagcombing optimization. Now, they are properly lowered during LegalizeVectorOps.
No new testcase because the original testcases still work.
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defm to start with #NAME. This makes instruction names more searchable again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171141 91177308-0d34-0410-b5e6-96231b3b80d8
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are currently used by code generation.
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instructions. Shouldn't change any functionality since they don't have patterns to select them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171128 91177308-0d34-0410-b5e6-96231b3b80d8
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reversed. Memory form writes memory, but was marked as MRMSrcMem.
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side effects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171121 91177308-0d34-0410-b5e6-96231b3b80d8
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really emitted by the backend, but it reduces the number of instructions in the output files with unmodelled side effects to make auditing easier.
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instruction didn't have a pattern. This was leftover from when tablegen used to complain if things were already inferred from patterns.
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definitions for a bunch of SSE2 integer arithmetic instructions.
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definitions for PAND/POR/PXOR/PANDN
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