| Age | Commit message (Expand) | Author |
|---|
| 2007-10-13 | Change unfoldMemoryOperand(). User is now responsible for passing in the | Evan Cheng |
| 2007-10-12 | Fold load / store into MOV32to32_ and MOV16to16_. | Evan Cheng |
| 2007-10-11 | Added tail call optimization to the x86 back end. It can be | Arnold Schwaighofer |
| 2007-10-07 | disable this entirely: it is causing use of invalidated iterators and infinit... | Chris Lattner |
| 2007-10-07 | Fix many regressions on x86 by avoiding dereferencing the end iterator. | Chris Lattner |
| 2007-10-06 | Oops, I really wanted to commit this part also :) | Anton Korobeynikov |
| 2007-10-06 | Move merge code into new helper function. | Anton Korobeynikov |
| 2007-10-05 | Added storeRegToAddr, loadRegFromAddr, and unfoldMemoryOperand's. | Evan Cheng |
| 2007-10-01 | Refactor code to add load / store folded instructions -> register only | Evan Cheng |
| 2007-09-29 | Enabling new condition code modeling scheme. | Evan Cheng |
| 2007-09-27 | TargetAsmInfo::getAddressSize() was incorrect for x86-64 and 64-bit targets | Dan Gohman |
| 2007-09-27 | Use GR64 in 64-bit mode. | Evan Cheng |
| 2007-09-26 | - Added MRegisterInfo::getCrossCopyRegClass() hook. For register classes wher... | Evan Cheng |
| 2007-09-26 | Allow copyRegToReg to emit cross register classes copies. | Evan Cheng |
| 2007-09-26 | Correctly restore stack pointer after realignment in main() on Cygwin/Mingw32 | Anton Korobeynikov |
| 2007-09-25 | Missing load / store folding entries. | Evan Cheng |
| 2007-09-25 | Added support for new condition code modeling scheme (i.e. physical register ... | Evan Cheng |
| 2007-09-24 | The code that used the StartLabelId label was removed, so remove the | Dan Gohman |
| 2007-09-20 | Fix several more entries in the x86 reload/remat folding tables. | Dan Gohman |
| 2007-09-19 | PSHUFDmi, etc. are actually folding a load, not a store. | Evan Cheng |
| 2007-09-18 | Move the entries for 64-bit CMP, IMUL, and a few others into the correct | Dan Gohman |
| 2007-09-17 | Remove RSTRegClass case from loadRegFromStackSlot | Dale Johannesen |
| 2007-09-14 | Remove the assumption that FP's are either float or | Dale Johannesen |
| 2007-09-14 | Remove isReg, isImm, and isMBB, and change all their users to use | Dan Gohman |
| 2007-09-10 | It's not safe to rematerialize MOV32r0 etc. by simply cloning the original | Evan Cheng |
| 2007-09-07 | Add lengthof and endof templates that hide a lot of sizeof computations. | Owen Anderson |
| 2007-08-30 | Added support to fold X86 load / store instructions. This allow rematerialize... | Evan Cheng |
| 2007-08-29 | Move getX86RegNum into X86RegisterInfo and use it | Duncan Sands |
| 2007-07-26 | Make sure epilogue esp adjustment is placed before any terminator and pop ins... | Evan Cheng |
| 2007-07-24 | Heal EH handling stuff by emitting correct offsets to callee-saved registers. | Anton Korobeynikov |
| 2007-07-19 | Change instruction description to split OperandList into OutOperandList and | Evan Cheng |
| 2007-07-19 | Only adjust esp around calls in presence of alloca. | Evan Cheng |
| 2007-07-18 | Use MOV instead of LEA to restore ESP if callee-saved frame size is 0; if pre... | Evan Cheng |
| 2007-07-17 | Fold prologue esp update when possible. | Evan Cheng |
| 2007-07-17 | Make sure not to break eh_return. | Evan Cheng |
| 2007-07-17 | Missed the case where alloca is used but the stack size (not including callee... | Evan Cheng |
| 2007-07-17 | Use push / pop for prologues and epilogues. | Evan Cheng |
| 2007-07-14 | Long live the exception handling! | Anton Korobeynikov |
| 2007-07-10 | Define non-intrinsic instructions for vector min, max, sqrt, rsqrt, and rcp, | Dan Gohman |
| 2007-07-04 | Refactor X87 instructions. As a side effect, all | Dale Johannesen |
| 2007-07-03 | Fix for PR 1505 (and 1489). Rewrite X87 register | Dale Johannesen |
| 2007-05-12 | More DWARF-related things cleanup: | Anton Korobeynikov |
| 2007-05-02 | Emit correct register move information in eh frames for X86. This allows Shoo... | Anton Korobeynikov |
| 2007-05-02 | Emit correct DWARF reg # for RA (return address) register | Anton Korobeynikov |
| 2007-05-01 | eliminateFrameIndex() change. | Evan Cheng |
| 2007-04-26 | Fix for PR1348. If stack inc / dec amount is > 32-bits, issue a series of add... | Evan Cheng |
| 2007-04-25 | do the multiplication as signed, so that 2*-2 == -4 instead of 4294967292 | Chris Lattner |
| 2007-04-25 | support for >4G stack frames | Chris Lattner |
| 2007-04-25 | support >4G stack frames | Chris Lattner |
| 2007-04-24 | Add the PADDQ to the list. | Bill Wendling |
