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path: root/lib/Target/X86/X86InstrCompiler.td
AgeCommit message (Expand)Author
2013-07-15Merge commit '7dfcb84fc16b3bf6b2379713b53090757f0a45f9'Eli Bendersky
2013-03-25Annotate X86InstrCompiler.td with SchedRW lists.Jakob Stoklund Olesen
2013-03-19Annotate X86InstrCompiler.td with SchedRW lists.Jakob Stoklund Olesen
2013-03-19Remove an invalid and unnecessary Pat pattern from the X86 backend:Ulrich Weigand
2013-03-11Merge commit '279b9184c2ff4fea93b198a3519b8cb3a1d8d195'Eli Bendersky
2013-02-23X86: Disable cmov-memory patterns on subtargets without cmov.Benjamin Kramer
2013-01-30Merge commit 'a662a9862501fc86904e90054f7c1519101d9126'Derek Schuff
2013-01-22Fix an issue of pseudo atomic instruction DAG scheduleMichael Liao
2013-01-07Remove # from the beginning and end of def names.Craig Topper
2012-12-26Add hasSideEffects=0 to some atomic instructions.Craig Topper
2012-11-14Fix nacl.read.tp() intrinsic to not generate "addl %gs:0, %REG"Mark Seaborn
2012-11-14Rename NotNaCl to IsNotNacl, for consistency with other similarly-named predi...JF Bastien
2012-10-16Merge commit '320db3f8052c9f506d9ea043ba5da534df40aa08'Derek Schuff
2012-10-15Add __builtin_setjmp/_longjmp supprt in X86 backendMichael Liao
2012-10-11Merge commit '2fa8af224ea026f9432e833fd6f42a216423a010'Derek Schuff
2012-10-07X86: fcmov doesn't handle all possible EFLAGS, fall back to a branch for the ...Benjamin Kramer
2012-10-05Remove some encoding bits I forgot to remove from SETB_C16r and SETB_C64r in ...Craig Topper
2012-10-05Move expansion of SETB_C(8/16/32/64)r from MCInstLower to ExpandPostRAPseudos...Craig Topper
2012-10-01Merge commit '72f0976c1b91c7ba50dce4d0ad0289dc14d37f81'Derek Schuff
2012-09-26Add 'lock' prefix output support in assembly printerMichael Liao
2012-09-25Merge commit 'bc4021f31eaa97ee52655828da3e3de14a39e4a6'Derek Schuff
2012-09-22Fix 16-bit atomic inst encoding and keep pseudo-inst starting with '#'Michael Liao
2012-09-22Fix typo in r164357Michael Liao
2012-09-21Fix a typo in r164357Michael Liao
2012-09-21Revise td of X86 atomic instructionsMichael Liao
2012-09-20Re-work X86 code generation of atomic ops with spin-loopMichael Liao
2012-09-13Fix the TCRETURNmi64 bug differently.Jakob Stoklund Olesen
2012-09-13Revert r163761 "Don't fold indexed loads into TCRETURNmi64."Jakob Stoklund Olesen
2012-09-13Don't fold indexed loads into TCRETURNmi64.Jakob Stoklund Olesen
2012-07-09LOCALMODs from hg 0b098ca44de7 against r158408 (hg 90a87d6bfe45)Derek Schuff
2012-06-01Implement the local-dynamic TLS model for x86 (PR3985)Hans Wennborg
2012-05-09Use ptr_rc_tailcall instead of GR32_TC.Jakob Stoklund Olesen
2012-05-07X86: optimization for -(x != 0)Manman Ren
2012-04-04Always compute all the bits in ComputeMaskedBits.Rafael Espindola
2012-03-29Make x86 REP_MOV* and REP_STO instructions use the correct operand sizes in 6...Lang Hames
2012-03-19This patch adds X86 instruction itineraries for non-pseudo opcodes inPreston Gurd
2012-02-24Add WIN_FTOL_* psudo-instructions to model the unique calling conventionMichael J. Spencer
2012-02-16Use the same CALL instructions for Windows as for everything else.Jakob Stoklund Olesen
2012-01-16Make sure the non-SSE lowering for fences correctly clobbers EFLAGS. PR11768.Eli Friedman
2012-01-16Get rid of unused codegen-only instruction.Eli Friedman
2012-01-12X86: Generalize the x << (y & const) optimization to also catch masks with mo...Benjamin Kramer
2011-12-24Switch the lowering of CTLZ_ZERO_UNDEF from a .td pattern back to theChandler Carruth
2011-12-20Begin teaching the X86 target how to efficiently codegen patterns thatChandler Carruth
2011-10-26Fixes an issue reported by -verify-machineinstrs.Rafael Espindola
2011-10-26This commit introduces two fake instructions MORESTACK_RET andRafael Espindola
2011-09-13Fix the assembler strings for a couple of atomic instructions. Doesn't reall...Eli Friedman
2011-09-07Fix atomic load and store on x86 to pass -verify-machineinstrs (and possibly ...Eli Friedman
2011-09-02Pseudo CMOV instructions don't clobber EFLAGS.Jakob Stoklund Olesen
2011-08-30Adds a SelectionDAG node X86SegAlloca which will be custom loweredRafael Espindola
2011-08-26Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction.Eli Friedman
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