aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/PowerPC/PPCInstrInfo.td
AgeCommit message (Expand)Author
2008-12-03Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning.Dan Gohman
2008-12-03Add a sanity-check to tablegen to catch the case where isSimpleLoadDan Gohman
2008-10-29Add a RM pseudoreg for the rounding mode, whichDale Johannesen
2008-10-24Mark MFCR as reading all condition code registers.Dale Johannesen
2008-10-23Mark defs and uses of CTR and LR correctly.Dale Johannesen
2008-10-16Fix warnings about mb/me being potentially usedDuncan Sands
2008-10-11Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's asChris Lattner
2008-09-12Rename ConstantSDNode::getValue to getZExtValue, for consistencyDan Gohman
2008-08-28Implement partial-word binary atomics on ppc.Dale Johannesen
2008-08-25Implement 32 & 64 bit versions of PPC atomicDale Johannesen
2008-08-25Remove PPC-specific lowering for atomics; theDale Johannesen
2008-08-22Implement __sync_synchronize on ppc32. Patch by Gary Benson.Dale Johannesen
2008-08-22Rewrite ppc code generated for __sync_{bool|val}_compare_and_swapDale Johannesen
2008-08-11Implement ISD::TRAP support on PPCNate Begeman
2008-07-12Implement llvm.atomic.cmp.swap.i32 on PPC. Patch by Gary Benson!Evan Cheng
2008-06-27Provide correct encoding for PPC LWARX instructions.Anton Korobeynikov
2008-04-30Tail call optimization improvements:Arnold Schwaighofer
2008-04-1964-bit atomic operations.Evan Cheng
2008-04-19PPC32 atomic operations.Evan Cheng
2008-03-15Replace all target specific implicit def instructions with a target independe...Evan Cheng
2008-03-10Add description of individual bits in CR. This fix PR1765.Nicolas Geoffray
2008-03-07Add support for ppc64 shifts with 7-bit (oversized) shift amount (e.g. PPCshl).Chris Lattner
2008-03-07Replace SDT_PPCShiftOp in favor of SDTIntBinOps. This allows it to workChris Lattner
2008-03-03This is the initial check-in for adding register scavenging to PPC. (Currently,Bill Wendling
2008-02-27Final de-tabification.Bill Wendling
2008-02-13Make register scavenging happy by not using a reg (CR0) that isn't definedNate Begeman
2008-01-15rename SDTRet -> SDTNone.Chris Lattner
2008-01-10remove explicit sets of 'neverHasSideEffects' that can now be Chris Lattner
2008-01-10get def use info more correct.Chris Lattner
2008-01-06rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.Chris Lattner
2008-01-06rename isStore -> mayStore to more accurately reflect what it captures.Chris Lattner
2008-01-06Change the 'isStore' inferrer to look for 'SDNPMayStore' Chris Lattner
2008-01-06remove some isStore flags that are now inferred automatically.Chris Lattner
2007-12-29Remove attribution from file headers, per discussion on llvmdev.Chris Lattner
2007-12-19Mark the "isRemat" instruction as never having side effects.Bill Wendling
2007-12-12Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materia...Evan Cheng
2007-12-07Initial commit of the machine code LICM pass. It successfully hoists this:Bill Wendling
2007-11-13Unifacalize the CALLSEQ{START,END} stuff.Bill Wendling
2007-11-13Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stackBill Wendling
2007-11-12Add a flag for indirect branch instructions.Owen Anderson
2007-10-23Temporary solution: added a different set of BCTRL_Macho / BCTRL_ELF with rig...Evan Cheng
2007-10-10Next PPC long double bits: ppcf128->i32 conversion.Dale Johannesen
2007-09-11Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead.Evan Cheng
2007-08-01Some out operands were incorrectly specified as input operands.Evan Cheng
2007-07-21No more noResults.Evan Cheng
2007-07-20Oops. These stores actually produce results.Evan Cheng
2007-07-19Change instruction description to split OperandList into OutOperandList andEvan Cheng
2007-07-06Do away with ImmutablePredicateOperand.Evan Cheng
2007-07-05PPC conditional branch predicate does not change after isel.Evan Cheng
2007-05-08PredicateOperand can be used as a normal operand for isel.Evan Cheng