aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/PowerPC/PPCInstr64Bit.td
AgeCommit message (Expand)Author
2007-09-11Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead.Evan Cheng
2007-09-04Fix for PR1613: added 64-bit rotate left PPC instructions and patterns.Evan Cheng
2007-08-01Some out operands were incorrectly specified as input operands.Evan Cheng
2007-07-21No more noResults.Evan Cheng
2007-07-20Oops. These stores actually produce results.Evan Cheng
2007-07-19Change instruction description to split OperandList into OutOperandList andEvan Cheng
2007-05-17add support for 128-bit add/sub on ppc64Chris Lattner
2007-04-03The PPC64 ELF ABI is "intended to use the same structure layout and calling c...Nicolas Geoffray
2007-04-03The ELF ABI specifies F1-F8 registers as argument registers for double, notNicolas Geoffray
2007-03-25Fix CodeGen/PowerPC/2007-03-24-cntlzd.llChris Lattner
2007-02-27Differentiate between the MachO and the ELF ABI the CALL instruction.Nicolas Geoffray
2007-02-25one important bugfix: PPC32 didn't have both elf and macho support forChris Lattner
2007-02-25implement support for the linux/ppc function call ABI. Patch byChris Lattner
2006-12-15Patterns no longer needed due to fix in the DAG combiner.Jim Laskey
2006-12-15Not all test cases are created equal. This fix is needed.Jim Laskey
2006-12-15Not needed. Misinterpreted error message from other bug (Missing load/storeJim Laskey
2006-12-15Provide 64-bit support for i64 sextload<i8>.Jim Laskey
2006-12-12Reduce number of instructions to load 64-bit constants.Jim Laskey
2006-12-06implement sextinreg i8->i64 and i16->i64Chris Lattner
2006-11-16This is a general clean up of the PowerPC ABI. Address several problems andJim Laskey
2006-11-16fix a regression that I introduced. stdu should scale the offset by 4Chris Lattner
2006-11-16add ppc64 r+i stores with update.Chris Lattner
2006-11-15Stop using isTwoAddress, switching to operand constraints instead.Chris Lattner
2006-11-15fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memriChris Lattner
2006-11-15Fix the PPC regressions last nightChris Lattner
2006-11-14Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 callsChris Lattner
2006-11-11implement proper PPC64 prolog/epilog codegen.Chris Lattner
2006-11-11Mark operands as symbol lo instead of imm32 so that they print lo(x) aroundChris Lattner
2006-11-10implement preinc support for r+i loads on ppc64Chris Lattner
2006-10-13Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.Evan Cheng
2006-10-09Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.Evan Cheng
2006-09-28Shift amounts are always 32-bits, even in 64-bit mode. This fixesChris Lattner
2006-07-18Make the implicit def instructions look like other instrs.Chris Lattner
2006-07-14Add missing PPC64 extload/truncstoresChris Lattner
2006-06-27Don't match 64-bit bitfield inserts into rlwimi's. todo add rldimi. :)Chris Lattner
2006-06-27Add a pattern for i64 sra. Print 8-byte units with a space between the .quadChris Lattner
2006-06-27Add 64-bit MTCTR so that indirect calls work.Chris Lattner
2006-06-27Fix an incorrect store pattern. This fixes em3d.Chris Lattner
2006-06-27Implement 64-bit undef, sub, shl/shr, srem/uremChris Lattner
2006-06-27Add zextload from i32 -> i64, with this, perimeter works.Chris Lattner
2006-06-26Rearrange compares, add ADDI8, add sext from 32-to-64 bit registerChris Lattner
2006-06-20Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit fileChris Lattner
2006-06-20add some logical opsChris Lattner
2006-06-20Add some more immediate patterns. This allows us to compile:Chris Lattner
2006-06-20Instead of li/xoris use li/oris. Note that this doesn't work if bit 15 isChris Lattner
2006-06-20Add some 64-bit logical ops.Chris Lattner
2006-06-20Add some patterns for globals, so we can now compile this:Chris Lattner
2006-06-20Add some patterns for ppc64Chris Lattner
2006-06-16Upgrade some load/store instructions to use the proper addressing mode stuff.Chris Lattner
2006-06-16fix some assumptions that pointers can only be 32-bits. With this, we canChris Lattner