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path: root/lib/Target/PowerPC/PPC.td
AgeCommit message (Expand)Author
2013-05-03[PowerPC] Add assembler parserUlrich Weigand
2013-04-12Add PPC instruction record forms and associated query functionsHal Finkel
2013-04-05Add a SchedMachineModel for the PPC G5Hal Finkel
2013-04-05Add a SchedMachineModel for the PPC A2Hal Finkel
2013-04-03PPC: Enable FRES and FRSQRTE on the default PPC64 descriptionHal Finkel
2013-04-03Remove some unsupported-feature comments from PPC.tdHal Finkel
2013-04-03Use PPC reciprocal estimates with Newton iteration in fast-math modeHal Finkel
2013-04-01Add more PPC floating-point conversion instructionsHal Finkel
2013-03-31Add the PPC lfiwax instructionHal Finkel
2013-03-29Add PPC FP rounding instructions fri[mnpz]Hal Finkel
2013-03-28Add the PPC64 ldbrx/stdbrx instructionsHal Finkel
2013-03-28Add the PPC64 popcntd instructionHal Finkel
2013-02-01Add notes about future PowerPC featuresBill Schmidt
2013-02-01LLVM enablement for some older PowerPC CPUsBill Schmidt
2013-01-30Add definitions for the PPC a2q core marked as having QPX availableHal Finkel
2012-08-28Add PPC Freescale e500mc and e5500 subtargets.Hal Finkel
2012-06-22Add support for the PPC isel instruction.Hal Finkel
2012-06-12Fixes for PPC host detection and features.Hal Finkel
2012-06-11Enable MFOCRF generation on the PPC A2 core.Hal Finkel
2012-06-11Rename the PPC target feature gpul to mfocrf.Hal Finkel
2012-06-11Add POWER6 and POWER7 CPU types to the PPC backend.Hal Finkel
2012-04-01Fix some 80-col. violations I introduced with the A2 PPC64 core.Hal Finkel
2012-04-01Add instruction itinerary for the PPC64 A2 core.Hal Finkel
2012-02-18Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu
2011-10-17Add PPC 440 scheduler and some associated testsHal Finkel
2011-10-14initial test commit (remove whitespace)Hal Finkel
2010-11-15dissolve some more hacks.Chris Lattner
2010-04-05Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field.Jakob Stoklund Olesen
2008-11-24Move target independent td files from lib/Target/ to include/llvm/Target so t...Evan Cheng
2007-12-29Remove attribution from file headers, per discussion on llvmdev.Chris Lattner
2007-03-06Switch PPC return lower to use an autogenerated CC description.Chris Lattner
2006-12-12Honor cpu directive, take two.Jim Laskey
2006-06-16Rename some subtarget features. A CPU now can *have* 64-bit instructions,Chris Lattner
2006-05-18getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.Evan Cheng
2006-05-17Remove PointerType from class TargetEvan Cheng
2006-03-16add callee saved vector regsChris Lattner
2006-03-13Mark instructions that are cracked by the PPC970 decoder as such.Chris Lattner
2006-03-12Several big changes:Chris Lattner
2006-02-28Add a subtarget feature for the stfiwx instruction. I know the G5 has it,Chris Lattner
2006-01-27Subtarget feature can now set any variable to any valueEvan Cheng
2005-10-26Add attribute name and type to SubtargetFeatures.Jim Laskey
2005-10-23mark this as betaChris Lattner
2005-10-23rearrange things a bit so that instructions can use subtarget features in theChris Lattner
2005-10-23improve -help outputChris Lattner
2005-10-22Add g3 back to the mix and reorder to irritate them anal folk. Actually, it'sJim Laskey
2005-10-2164-bit reg support should not be enabled by default, as support isn't complete.Chris Lattner
2005-10-21Plugin new subtarget backend into the build.Jim Laskey
2005-10-19Added InstrSchedClass to each of the PowerPC Instructions.Jim Laskey
2005-10-14Rename PowerPC*.td -> PPC*.tdChris Lattner
2005-10-14Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.tdChris Lattner