| Age | Commit message (Expand) | Author |
| 2013-01-02 | Move all of the header files which are involved in modelling the LLVM IR | Chandler Carruth |
| 2012-12-03 | Use the new script to sort the includes of every file under lib. | Chandler Carruth |
| 2012-06-06 | Remove unused private fields found by clang's new -Wunused-private-field. | Benjamin Kramer |
| 2012-03-17 | Reorder includes in Target backends to following coding standards. Remove som... | Craig Topper |
| 2012-02-18 | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu |
| 2012-02-07 | Convert assert(0) to llvm_unreachable | Craig Topper |
| 2012-01-20 | More dead code removal (using -Wunreachable-code) | David Blaikie |
| 2011-12-07 | Add bundle aware API for querying instruction properties and switch the code | Evan Cheng |
| 2011-11-15 | Make use of MachinePointerInfo::getFixedStack. This removes all mention | Jay Foad |
| 2011-08-24 | Move TargetRegistry and TargetSelect from Target to Support where they belong. | Evan Cheng |
| 2011-07-14 | Next round of MC refactoring. This patch factor MC table instantiations, MC | Evan Cheng |
| 2011-07-11 | - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo | Evan Cheng |
| 2011-07-01 | Hide the call to InitMCInstrInfo into tblgen generated ctor. | Evan Cheng |
| 2011-06-28 | Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. | Evan Cheng |
| 2011-06-28 | Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc | Evan Cheng |
| 2011-06-28 | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng |
| 2010-11-27 | Move callee-saved regs spills / reloads to TFI | Anton Korobeynikov |
| 2010-09-21 | convert targets to the new MF.getMachineMemOperand interface. | Chris Lattner |
| 2010-07-16 | Remove the isMoveInstr() hook. | Jakob Stoklund Olesen |
| 2010-07-16 | Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and | Bill Wendling |
| 2010-07-11 | Replace copyRegToReg with copyPhysReg for MSP430. | Jakob Stoklund Olesen |
| 2010-06-17 | Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This | Stuart Hastings |
| 2010-05-22 | Implement @llvm.returnaddress. rdar://8015977. | Evan Cheng |
| 2010-05-06 | Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it | Dan Gohman |
| 2010-05-06 | Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. | Evan Cheng |
| 2010-05-01 | Implement indirect branches on MSP430 | Anton Korobeynikov |
| 2010-04-07 | Educate GetInstrSizeInBytes implementations that | Dale Johannesen |
| 2010-04-02 | use DebugLoc default ctor instead of DebugLoc::getUnknownLoc() | Chris Lattner |
| 2010-04-02 | Teach AnalyzeBranch, RemoveBranch and the branch | Dale Johannesen |
| 2010-02-09 | move target-independent opcodes out of TargetInstrInfo | Chris Lattner |
| 2010-01-15 | Add branch relaxation pass (shamelessly stolen from PPC). | Anton Korobeynikov |
| 2009-12-05 | Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of | Dan Gohman |
| 2009-12-03 | improve portability to avoid conflicting with std::next in c++'0x. | Chris Lattner |
| 2009-11-07 | Add few pseudo-source-values | Anton Korobeynikov |
| 2009-10-21 | RMW preprocessing stuff was incorrect. Grab the stuff from x86 backend and di... | Anton Korobeynikov |
| 2009-10-21 | Implement branch folding | Anton Korobeynikov |
| 2009-07-14 | llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. | Torok Edwin |
| 2009-07-11 | assert(0) -> LLVM_UNREACHABLE. | Torok Edwin |
| 2009-05-13 | Change MachineInstrBuilder::addReg() to take a flag instead of a list of | Bill Wendling |
| 2009-05-03 | Add InsertBranch() hook for tail mergeing | Anton Korobeynikov |
| 2009-05-03 | Add code for save/restore of callee-saved registers | Anton Korobeynikov |
| 2009-05-03 | First draft of stack slot loads / stores lowering | Anton Korobeynikov |
| 2009-05-03 | Add call frame setup instruction elimination and lowerid for bunch of call-re... | Anton Korobeynikov |
| 2009-05-03 | Add 8-bit insts. zext behaviour is not modelled yet | Anton Korobeynikov |
| 2009-05-03 | Add code enough for emission of reg-reg and reg-imm moves. This allows us to ... | Anton Korobeynikov |
| 2009-05-03 | Dummy MSP430 backend | Anton Korobeynikov |