emscripten-fastcomp - LLVM with the emscripten fastcomp javascript backend

Age	Commit message (Expand)	Author
2012-09-14	DAG post-process for Hexagon MI scheduler	Sergei Larin
2012-09-14	Remove redundant private field.	Benjamin Kramer
2012-09-11	Reorganize MachineScheduler interfaces and publish them in the header.	Andrew Trick
2012-09-10	Add "blocked" heuristic to the Hexagon MI scheduler.	Sergei Larin
2012-09-07	Fix alignment of .comm and .lcomm on mingw32.	Benjamin Kramer
2012-09-07	MC: Overhaul handling of .lcomm	Benjamin Kramer
2012-09-05	LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the	Pranav Bhandarkar
2012-09-05	Remove redundant semicolons to fix -pedantic-errors build.	Richard Smith
2012-09-04	Porting Hexagon MI Scheduler to the new API.	Sergei Larin
2012-08-29	Rename hasVolatileMemoryRef() to hasOrderedMemoryRef().	Jakob Stoklund Olesen
2012-08-22	Add a getName function to MachineFunction. Use it in places that previously d...	Craig Topper
2012-08-20	fix HexagonSubtarget parsing of -mv flag	Sebastian Pop
2012-08-13	[Hexagon] Don't mark callee saved registers as clobbered by a tail call	Arnold Schwaighofer
2012-08-08	Don't use getNextOperandForReg().	Jakob Stoklund Olesen
2012-07-19	default to use -mv4 when no version of Hexagon has been specified	Sebastian Pop
2012-07-19	Remove tabs.	Bill Wendling
2012-07-19	Remove tabs.	Bill Wendling
2012-07-13	Remove variable_ops from call instructions in most targets.	Jakob Stoklund Olesen
2012-07-07	I'm introducing a new machine model to simultaneously allow simple	Andrew Trick
2012-07-02	Consistently use AnalysisID types in TargetPassConfig.	Bob Wilson
2012-07-02	Add all codegen passes to the PassManager via TargetPassConfig.	Bob Wilson
2012-06-26	There are a number of generic inline asm operand modifiers that	Jack Carter
2012-06-24	llvm/lib: [CMake] Add explicit dependency to intrinsics_gen.	NAKAMURA Takumi
2012-06-22	Revert r158679 - use case is unclear (and it increases the memory footprint).	Hal Finkel
2012-06-18	Allow up to 64 functional units per processor itinerary.	Hal Finkel
2012-06-13	*typo: Cyles changed to Cycles	Kay Tiong Khoo
2012-06-09	Silence a gcc-4.6 warning: GCC fails to understand that secondReg and cmpOp2 are	Duncan Sands
2012-06-05	misched: Added MultiIssueItineraries.	Andrew Trick
2012-06-02	Fix typos found by http://github.com/lyda/misspell-check	Benjamin Kramer
2012-06-01	Switch some getAliasSet clients to MCRegAliasIterator.	Jakob Stoklund Olesen
2012-05-30	Extract some pointer hacking to a function.	Jakob Stoklund Olesen
2012-05-30	Fix some uses of getSubRegisters() to use getSubReg() instead.	Jakob Stoklund Olesen
2012-05-25	Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall	Justin Holewinski
2012-05-16	Hexagon: Remove unused command line option.	Benjamin Kramer
2012-05-14	Revert 156634 upon request until code improvement changes are made.	Brendon Cahoon
2012-05-13	Hexagon: Initialize TBB to 0.	Benjamin Kramer
2012-05-12	Make sure new value jump is enabled for Hexagon V5 as well.	Sirish Pande
2012-05-12	Support for Hexagon feature, New Value Jump.	Sirish Pande
2012-05-11	Updated instruction table due to addded intrinsics.	Brendon Cahoon
2012-05-11	Remove warnings from HexagonVLIWPacketizer.	Sirish Pande
2012-05-11	Hexagon constant extender support.	Brendon Cahoon
2012-05-11	Hexagon V5 intrinsics support.	Sirish Pande
2012-05-10	Hexagon V5 Support - V5 td file.	Sirish Pande
2012-05-10	Hexagon V5 FP Support.	Sirish Pande
2012-05-08	Remove excess semi-colons to quiet warnings.	Eric Christopher
2012-05-08	Update load/store instruction patterns in Hexagon V4.	Sirish Pande
2012-05-07	Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().	Jakob Stoklund Olesen
2012-05-04	Remove the SubRegClasses field from RegisterClass descriptions.	Jakob Stoklund Olesen
2012-05-03	Support for target dependent Hexagon VLIW packetizer.	Sirish Pande
2012-05-03	Extensions of Hexagon V4 instructions.	Sirish Pande