Age | Commit message (Expand) | Author |
2013-10-11 | Cherry-pick LLVM 187787 to prevent tail calls on x86-32 when not appropriate. | Jan Voung |
2013-05-01 | Hexagon: Use multiclass for Jump instructions. | Jyotsna Verma |
2013-04-20 | Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE. | Tim Northover |
2013-04-04 | Hexagon: Expand br_cc. | Jyotsna Verma |
2013-03-08 | DAGCombiner: Use correct value type for checking legality of BR_CC v3 | Tom Stellard |
2013-03-07 | Hexagon: Handle i8, i16 and i1 Var Args. | Jyotsna Verma |
2013-03-07 | Hexagon: Add support to lower block address. | Jyotsna Verma |
2013-03-05 | reverting patch 176508. | Jyotsna Verma |
2013-03-05 | Hexagon: Add support for lowering block address. | Jyotsna Verma |
2013-03-05 | Hexagon: Expand addc, adde, subc and sube. | Jyotsna Verma |
2013-02-21 | Hexagon: Expand cttz, ctlz, and ctpop for now. | Anshuman Dasgupta |
2013-02-20 | Update TargetLowering ivars for name policy. | Jim Grosbach |
2013-02-05 | Move MRI liveouts to Hexagon return instructions. | Jakob Stoklund Olesen |
2013-01-29 | Teach SDISel to combine fsin / fcos into a fsincos node if the following | Evan Cheng |
2013-01-14 | Improve r172468: const_cast is not needed here | Dmitri Gribenko |
2013-01-14 | Fix Another Cast | David Greene |
2013-01-02 | Move all of the header files which are involved in modelling the LLVM IR | Chandler Carruth |
2012-12-03 | Use the new script to sort the includes of every file under lib. | Chandler Carruth |
2012-11-21 | Finish the renaming. | Rafael Espindola |
2012-09-25 | TargetLowering interface to set/get minimum block entries for jump tables. | Sebastian Pop |
2012-07-19 | Remove tabs. | Bill Wendling |
2012-06-02 | Fix typos found by http://github.com/lyda/misspell-check | Benjamin Kramer |
2012-05-25 | Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall | Justin Holewinski |
2012-05-10 | Hexagon V5 FP Support. | Sirish Pande |
2012-04-23 | Revert r155365, r155366, and r155367. All three of these have regression | Chandler Carruth |
2012-04-23 | Hexagon V5 (floating point) support. | Sirish Pande |
2012-04-21 | llvm/lib/Target: [PR12611] Add "llvm/Support/raw_ostream.h" for Debug build o... | NAKAMURA Takumi |
2012-04-21 | HexagonISelLowering.cpp: Reorder #includes. | NAKAMURA Takumi |
2012-04-20 | Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change s... | Craig Topper |
2012-04-18 | This reverts a long string of commits to the Hexagon backend. These | Chandler Carruth |
2012-04-16 | Remove unused variable | David Blaikie |
2012-04-16 | Hexagon V5 (Floating Point) Support. | Sirish Pande |
2012-03-17 | Reorder includes in Target backends to following coding standards. Remove som... | Craig Topper |
2012-03-11 | Convert more static tables of registers used by calling convention to uint16_... | Craig Topper |
2012-02-28 | Re-commit r151623 with fix. Only issue special no-return calls if it's a dire... | Evan Cheng |
2012-02-28 | Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack pre... | Daniel Dunbar |
2012-02-28 | Some ARM implementaions, e.g. A-series, does return stack prediction. That is, | Evan Cheng |
2012-02-07 | Convert assert(0) to llvm_unreachable | Craig Topper |
2012-02-01 | VLIW specific scheduler framework that utilizes deterministic finite automato... | Andrew Trick |
2012-01-20 | More dead code removal (using -Wunreachable-code) | David Blaikie |
2012-01-06 | Initializing to false makes better sense. Thanks, David. | Chad Rosier |
2012-01-06 | Fix uninitialized variable warning. | Chad Rosier |
2011-12-18 | Hexagon: Remove unused variables. | Benjamin Kramer |
2011-12-13 | Initial CodeGen support for CTTZ/CTLZ where a zero input produces an | Chandler Carruth |
2011-12-12 | Hexagon backend support | Tony Linthicum |