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path: root/lib/Target/Hexagon/HexagonISelLowering.cpp
AgeCommit message (Expand)Author
2013-10-11Cherry-pick LLVM 187787 to prevent tail calls on x86-32 when not appropriate.Jan Voung
2013-05-01Hexagon: Use multiclass for Jump instructions.Jyotsna Verma
2013-04-20Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE.Tim Northover
2013-04-04Hexagon: Expand br_cc.Jyotsna Verma
2013-03-08DAGCombiner: Use correct value type for checking legality of BR_CC v3Tom Stellard
2013-03-07Hexagon: Handle i8, i16 and i1 Var Args.Jyotsna Verma
2013-03-07Hexagon: Add support to lower block address.Jyotsna Verma
2013-03-05reverting patch 176508.Jyotsna Verma
2013-03-05Hexagon: Add support for lowering block address.Jyotsna Verma
2013-03-05Hexagon: Expand addc, adde, subc and sube.Jyotsna Verma
2013-02-21Hexagon: Expand cttz, ctlz, and ctpop for now.Anshuman Dasgupta
2013-02-20Update TargetLowering ivars for name policy.Jim Grosbach
2013-02-05Move MRI liveouts to Hexagon return instructions.Jakob Stoklund Olesen
2013-01-29Teach SDISel to combine fsin / fcos into a fsincos node if the followingEvan Cheng
2013-01-14Improve r172468: const_cast is not needed hereDmitri Gribenko
2013-01-14Fix Another CastDavid Greene
2013-01-02Move all of the header files which are involved in modelling the LLVM IRChandler Carruth
2012-12-03Use the new script to sort the includes of every file under lib.Chandler Carruth
2012-11-21Finish the renaming.Rafael Espindola
2012-09-25TargetLowering interface to set/get minimum block entries for jump tables.Sebastian Pop
2012-07-19Remove tabs.Bill Wendling
2012-06-02Fix typos found by http://github.com/lyda/misspell-checkBenjamin Kramer
2012-05-25Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCallJustin Holewinski
2012-05-10Hexagon V5 FP Support.Sirish Pande
2012-04-23Revert r155365, r155366, and r155367. All three of these have regressionChandler Carruth
2012-04-23Hexagon V5 (floating point) support.Sirish Pande
2012-04-21llvm/lib/Target: [PR12611] Add "llvm/Support/raw_ostream.h" for Debug build o...NAKAMURA Takumi
2012-04-21HexagonISelLowering.cpp: Reorder #includes.NAKAMURA Takumi
2012-04-20Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change s...Craig Topper
2012-04-18This reverts a long string of commits to the Hexagon backend. TheseChandler Carruth
2012-04-16Remove unused variableDavid Blaikie
2012-04-16Hexagon V5 (Floating Point) Support.Sirish Pande
2012-03-17Reorder includes in Target backends to following coding standards. Remove som...Craig Topper
2012-03-11Convert more static tables of registers used by calling convention to uint16_...Craig Topper
2012-02-28Re-commit r151623 with fix. Only issue special no-return calls if it's a dire...Evan Cheng
2012-02-28Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack pre...Daniel Dunbar
2012-02-28Some ARM implementaions, e.g. A-series, does return stack prediction. That is,Evan Cheng
2012-02-07Convert assert(0) to llvm_unreachableCraig Topper
2012-02-01VLIW specific scheduler framework that utilizes deterministic finite automato...Andrew Trick
2012-01-20More dead code removal (using -Wunreachable-code)David Blaikie
2012-01-06Initializing to false makes better sense. Thanks, David.Chad Rosier
2012-01-06Fix uninitialized variable warning.Chad Rosier
2011-12-18Hexagon: Remove unused variables.Benjamin Kramer
2011-12-13Initial CodeGen support for CTTZ/CTLZ where a zero input produces anChandler Carruth
2011-12-12Hexagon backend supportTony Linthicum