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path: root/lib/Target/CellSPU/SPUAsmPrinter.cpp
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2012-11-14Remove the CellSPU port.Eric Christopher
Approved by Chris Lattner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167984 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-24Fix integer undefined behavior due to signed left shift overflow in LLVM.Richard Smith
Reviewed offline by chandlerc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162623 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26There are a number of generic inline asm operand modifiers thatJack Carter
up to r158925 were handled as processor specific. Making them generic and putting tests for these modifiers in the CodeGen/Generic directory caused a number of targets to fail. This commit addresses that problem by having the targets call the generic routine for generic modifiers that they don't currently have explicit code for. For now only generic print operands 'c' and 'n' are supported.vi Affected files: test/CodeGen/Generic/asm-large-immediate.ll lib/Target/PowerPC/PPCAsmPrinter.cpp lib/Target/NVPTX/NVPTXAsmPrinter.cpp lib/Target/ARM/ARMAsmPrinter.cpp lib/Target/XCore/XCoreAsmPrinter.cpp lib/Target/X86/X86AsmPrinter.cpp lib/Target/Hexagon/HexagonAsmPrinter.cpp lib/Target/CellSPU/SPUAsmPrinter.cpp lib/Target/Sparc/SparcAsmPrinter.cpp lib/Target/MBlaze/MBlazeAsmPrinter.cpp lib/Target/Mips/MipsAsmPrinter.cpp MSP430 isn't represented because it did not even run with the long existing 'c' modifier and it was not apparent what needs to be done to get it inline asm ready. Contributer: Jack Carter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159203 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-18Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu
MSP430, PPC, PTX, Sparc, X86, XCore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-20More dead code removal (using -Wunreachable-code)David Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148578 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Move TargetRegistry and TargetSelect from Target to Support where they belong.Evan Cheng
These are strictly utilities for registering targets and components. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138450 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-28Add branch hinting for SPU. Kalle Raiskila
The implemented algorithm is overly simplistic (just speculate all branches are taken)- this is work in progress. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126651 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14move all the target's asmprinters into the main target. The piece Chris Lattner
that should be split out is the InstPrinter (if a target is mc'ized). This change makes all the targets be consistent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119056 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-20CellSPU:Scott Michel
(a) Remove moved file (SPUAsmPrinter.cpp) to make svn happy. (b) Remove truncated stores that will never be used. (c) Add initial support for __muldi3 as a libcall. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59734 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-08CellSPU: Bring SPU's assembly printer more in-line with current LLVM codeScott Michel
structure. Assembly printer now outputs the correct section for strings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58921 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-30Resolve bug 2947: vararg-marked functions must spill registers R3-R79 to stackScott Michel
so that va_start/va_arg/et.al. will walk arguments correctly for Cell SPU. N.B.: Because neither clang nor llvm-gcc-4.2 can be built for CellSPU, this is still unexorcised code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58415 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-03Switch the MachineOperand accessors back to the short names likeDan Gohman
isReg, etc., from isRegister, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-26If we have a function with an unreachable statement such that the ending debugBill Wendling
information is in an unreachable block, then it's possible that the high/low pc values won't be set for the dwarf information. E.g., this function: void abort(void) __attribute__((__noreturn__)); void dead_beef(void) __attribute__ ((noreturn)); int *b; void dead_beef(void) { *b=0xdeadbeef; abort(); } has a call to "@llvm.dbg.region.end" only in the unreachable block: define void @dead_beef() noreturn nounwind { entry: call void @llvm.dbg.func.start(...) call void @llvm.dbg.stoppoint(...) ... call void @abort( ) noreturn nounwind unreachable return: ; No predecessors! call void @llvm.dbg.stoppoint(...) call void @llvm.dbg.region.end(...) ret void } The dwarf information emitted is something like: 0x00000084: TAG_subprogram [5] AT_name( "dead_beef" ) AT_external( 0x01 ) AT_prototyped( 0x01 ) AT_decl_file( 0x01 ) AT_decl_line( 0x08 ) Note that this is *not* the best fix for this problem, but a band-aid for an gaping wound. This code needs to be changed when we revamp our debugging information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56628 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24Move actual section printing stuff to AsmPrinter from TAI reducing heap traffic.Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56573 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24Drop obsolete hook and change all usage to new interfaceAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56572 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24SPU section handling is really huge mess. Replace remaining TAI calls for ↵Anton Korobeynikov
sections with explicit names in order not to block existing backends during section handling migration. SPU folks! Please consider using new section handling facility someday. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56570 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21Use raw_ostream throughout the AsmPrinter.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55092 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-09Emit debug info for data-only files on Cell SPU.Dale Johannesen
I cannot test this target, let me know if it breaks! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53363 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14Add CommonLinkage; currently tentative definitionsDale Johannesen
are represented as "weak", but there are subtle differences in some cases on Darwin, so we need both. The intent is that "common" will behave identically to "weak" unless somebody changes their target to do something else. No functional change as yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51118 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-28Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to ↵Evan Cheng
16-byte boundaries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47703 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26Change "Name" to "AsmName" in the target register info. Gee, a refactoring toolBill Wendling
would have been a Godsend here! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47625 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-10Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-02Get rid of the annoying blank lines before labels.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46667 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-30More cleanups for CellSPU:Scott Michel
- Expand tabs... (poss 80-col violations, will get them later...) - Consolidate logic for SelectDFormAddr and SelectDForm2Addr into a single function, simplifying maintenance. Also reduced custom instruction generation for SPUvecinsert/INSERT_MASK. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46544 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-29Overhaul Cell SPU's addressing mode internals so that there are nowScott Michel
only two addressing mode nodes, SPUaform and SPUindirect (vice the three previous ones, SPUaform, SPUdform and SPUxform). This improves code somewhat because we now avoid using reg+reg addressing when it can be avoided. It also simplifies the address selection logic, which was the main point for doing this. Also, for various global variables that would be loaded using SPU's A-form addressing, prefer D-form offs[reg] addressing, keeping the base in a register if the variable is used more than once. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46483 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-30Add new shorter predicates for testing machine operands for various types: Chris Lattner
e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on switching everything over, so new clients should just start using the shorter names. Remove old long accessors, switching everything over to use the short accessor: getMachineBasicBlock() -> getMBB(), getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45464 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-30Use MachineOperand::getImm instead of MachineOperand::getImmedValue. ↵Chris Lattner
Likewise setImmedValue -> setImm git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45453 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29Remove attribution from file headers, per discussion on llvmdev.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-20More working CellSPU tests:Scott Michel
- vec_const.ll: Vector constant loads - immed64.ll: i64, f64 constant loads git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45242 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-05Updated source file headers to llvm coding standard.Scott Michel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44597 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-04More of the Cell SPU code drop from "Team Aerospace".Scott Michel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44582 91177308-0d34-0410-b5e6-96231b3b80d8
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