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2011-10-27Remove the Alpha backend.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143164 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15Use set operations instead of plain lists to enumerate register classes.Jakob Stoklund Olesen
This simplifies many of the target description files since it is common for register classes to be related or contain sequences of numbered registers. I have verified that this doesn't change the files generated by TableGen for ARM and X86. It alters the allocation order of MBlaze GPR and Mips FGR32 registers, but I believe the change is benign. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133105 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-09Remove custom allocation order boilerplate that is no longer needed.Jakob Stoklund Olesen
The register allocators automatically filter out reserved registers and place the callee saved registers last in the allocation order, so custom methods are no longer necessary just for that. Some targets still use custom allocation orders: ARM/Thumb: The high registers are removed from GPR in thumb mode. The NEON allocation orders prefer to use non-VFP2 registers first. X86: The GR8 classes omit AH-DH in x86-64 mode to avoid REX trouble. SystemZ: Some of the allocation orders are omitting R12 aliases without explanation. I don't understand this target well enough to fix that. It looks like all the boilerplate could be removed by reserving the right registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132781 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29Remove attribution from file headers, per discussion on llvmdev.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-11Use TableGen to emit information for dwarf register numbers. Anton Korobeynikov
This makes DwarfRegNum to accept list of numbers instead. Added three different "flavours", but only slightly tested on x86-32/linux. Please check another subtargets if possible, git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43997 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17Constify some methods. Patch provided by Anton Vayvod, thanks!Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29756 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24Add dwarf register numbering to register data.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27081 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01Support multiple ValueTypes per RegisterClass, needed for upcoming vectorNate Begeman
work. This change has no effect on generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30All sorts of stuff.Andrew Lenharth
Getting in on the custom lowering thing, yay evilness with fp setcc, yuck trivial int select, hmmm in memory args for functions, yay DIV and REM, always handy. They should be custom lowered though. Lots more stuff compiles now (go go single source!). Of course, none of it probably works, but that is what the nightly tester can find out :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24533 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-09whatever. Intermediate patch to see what breaks. Seems ok.Andrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24260 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Put register classes in namespacesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22924 91177308-0d34-0410-b5e6-96231b3b80d8
2005-06-29Get rid of all symbolic loads. I now do gernate all relocations sequencesAndrew Lenharth
rather than relying on the assembler. Only a few more pseudo instructions left. Also merge load code paths. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22305 91177308-0d34-0410-b5e6-96231b3b80d8
2005-06-27who said we had to use the return address in the return address register. ↵Andrew Lenharth
Might save a move in many cases git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22293 91177308-0d34-0410-b5e6-96231b3b80d8
2005-02-10so, if you beat on it, you too can talk emacs into having a sane indenting ↵Andrew Lenharth
policy... Also, optimize many function calls with pc-relative calls (partial prologue skipping for that case coming soon), try to fix the random jumps to strange places problem by pesimizing div et. al. register usage and fixing up GP before using, some calling convention tweaks, and make frame pointer unallocatable (not strickly necessary, but let's go for correctness first) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20106 91177308-0d34-0410-b5e6-96231b3b80d8
2005-02-10* Fix spelling of `volatile'Misha Brukman
* Align comments with tablegen elements git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20103 91177308-0d34-0410-b5e6-96231b3b80d8
2005-02-06prefer FP scratch registers and more check in LowerArgumentsAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20057 91177308-0d34-0410-b5e6-96231b3b80d8
2005-02-04Make file header comment consistent: extend the whole 80 cols to fill the lineMisha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20039 91177308-0d34-0410-b5e6-96231b3b80d8
2005-02-02oopsAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20003 91177308-0d34-0410-b5e6-96231b3b80d8
2005-02-02prevent register allocator from using the stack pointer :)Andrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20002 91177308-0d34-0410-b5e6-96231b3b80d8
2005-02-01fix register namesAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19971 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-27stack frame fix and zero FP reg fixAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19857 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22Let me introduce you to the early stages of the llvm backend for the alpha ↵Andrew Lenharth
processor git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19764 91177308-0d34-0410-b5e6-96231b3b80d8
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