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AgeCommit message (Expand)Author
2012-10-30ARM: Better disassembly for pc-relative LDR.Jim Grosbach
2012-10-29Fix ARM's b.w instruction for thumb 2 and the encoding T4. The branch targetKevin Enderby
2012-10-28Remove TargetELFWriterInfo.Rafael Espindola
2012-10-27[code size][ARM] Emit regular call instructions instead of the move, branch s...Quentin Colombet
2012-10-26Revert r163298 "Optimize codegen for VSETLNi{8,16,32} operating on Q registers."Jakob Stoklund Olesen
2012-10-26Avoid an unused-variable warning when asserts are disabled.Kaelyn Uhrain
2012-10-2680 col.Jakob Stoklund Olesen
2012-10-26Remove ARMBaseRegisterInfo::isReservedReg().Jakob Stoklund Olesen
2012-10-26Add GPRPair Register class to ARM.Jakob Stoklund Olesen
2012-10-26Remove the canCombineSubRegIndices() target hook.Jakob Stoklund Olesen
2012-10-25[ms-inline asm] Add support for creating AsmRewrites in the target specificChad Rosier
2012-10-25Merge commit 'a8a0a155de16830b8fcab539ba2ec21de3145532'Derek Schuff
2012-10-24Change BKPT and UDF instruction encodings to match NaCl ARM validator and run...JF Bastien
2012-10-24Fix a miscompilation caused by a typo. When turning a adde with negative valueEvan Cheng
2012-10-24Implement a basic VectorTargetTransformInfo interface to be used by the loop ...Nadav Rotem
2012-10-24Add in support for getIntPtrType to get the pointer type based on the address...Micah Villmow
2012-10-23Make branch heavy code for generating marked up disassembly simplerKevin Enderby
2012-10-23Merge commit '92b0d8cf2c51debc7f4fb30a417ae839077a8ed0'Derek Schuff
2012-10-22When a block ends in an indirect branch, add its successors to the machine ba...Bill Wendling
2012-10-22Add support for annotated disassembly output for X86 and arm.Kevin Enderby
2012-10-19ARM:Stepan Dyatkovskiy
2012-10-18Reapply the TargerTransformInfo changes, minus the changes to LSR and Lowerin...Nadav Rotem
2012-10-18Fix a bug where a 32-bit address with the high bit does not get symbolicatedKevin Enderby
2012-10-18Merge commit '3298959540ca744ec16b4c65db244534a929a862'Derek Schuff
2012-10-18Temporarily revert the TargetTransform changes.Bob Wilson
2012-10-17Merge MRI::isPhysRegOrOverlapUsed() into isPhysRegUsed().Jakob Stoklund Olesen
2012-10-16Merge commit '320db3f8052c9f506d9ea043ba5da534df40aa08'Derek Schuff
2012-10-16Remove spurious definition from LOADSTORE_TSTDavid Sehr
2012-10-16Issue:Stepan Dyatkovskiy
2012-10-15ARM: v1i64 and v2i64 VBSL intrinsic support.Jim Grosbach
2012-10-15Merge commit 'bb20b24224734f5369d124181d086703ca439dd7'Derek Schuff
2012-10-15Resubmit the changes to llvm core to update the functions to support differen...Micah Villmow
2012-10-15Fixed PR13938: the ARM backend was crashing because it couldn't select a VDUP...Silviu Baranga
2012-10-13[ms-inline asm] Remove the MatchInstruction() function. Previously, this wasChad Rosier
2012-10-12ARM: tail-call inside a function where part of a byval argument is on caller'sManman Ren
2012-10-12Merge commit '40573998821fde7ffeabe8507f4c9e8c7cf762f6'Derek Schuff
2012-10-12ARM: Mark VSELECT as 'expand'.Jim Grosbach
2012-10-12[ms-inline asm] Use the new API introduced in r165830 in lieu of theChad Rosier
2012-10-11Merge commit '2fa8af224ea026f9432e833fd6f42a216423a010'Derek Schuff
2012-10-11Remove unnecessary classof()'sSean Silva
2012-10-11Revert 165732 for further review.Micah Villmow
2012-10-11Fix ARM issues reported by --verify-machineinstrsDavid Sehr
2012-10-11Add in the first iteration of support for llvm/clang/lldb to allow variable p...Micah Villmow
2012-10-10Add isel patterns for v2f32 / v4f32 neon.vbsl intrinsics. rdar://12471808Evan Cheng
2012-10-10Add a new interface to allow IR-level passes to access codegen-specific infor...Nadav Rotem
2012-10-10Add missing EmitInstruction. This is a tiny piece of fixing the predicatedDavid Sehr
2012-10-10Revert "Enable predicated sandboxed load/store for ARM"David Sehr
2012-10-10Fix for LDRB instruction:Stepan Dyatkovskiy
2012-10-10Issue description:Stepan Dyatkovskiy
2012-10-10misched: Use the TargetSchedModel interface wherever possible.Andrew Trick
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